Analytical Model and Performance Investigation of Electric Potential for Junctionless Cylindrical Surrounding Gate (JLCSG) MOSFET

In this paper expression for surface potential of a junction less cylindrical surrounding gate (JLCSG) MOSFET has been derived using 2D Poisson's equation. The proposed JLCSG MOSFET has no source/drain junction as the doping of channel region is the same as that of source/drain region. The analytical results are compared with the numerical solution using 2D device simulator. The result shows the variation of channel potential with the applied gate and drain bias voltage. The electrostatic parameters of JLCSG MOSFET such as subthreshold swing (SS), I-ON/I-OFF, ratio, the threshold voltage (V-t) and drain induced barrier lowering (DIBL) are investigated through exhaustive device simulation. Further, in this paper various analog/RF performance parameters have also been investigated. The performance figure of merits (FOMs) shows that the proposed device has bright future in higher speed and low power communication circuit applications.