The effect of mismatch in current- versus voltage-mode resistive grids

被引:8
|
作者
Shi, Bertram E. [1 ]
机构
[1] Hong Kong Univ Sci & Technol, Dept Elect & Comp Engn, Kowloon, Hong Kong, Peoples R China
关键词
neuromorphic engineering; resistive grid; component mismatch; analog VLSI; IMAGE; NETWORKS; CIRCUITS; CHIP;
D O I
10.1002/cta.494
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Resistive grids are commonly used in neuromorphic very large-scale integration (VLSI) designs for image smoothing and signal aggregation. Because mismatch is inevitable in VLSI chips, one reason that resistive Grids are attractive is that their output is robust to mismatch in the component values. Here, we examine relative sensitivity of different resistive grid designs that differ depending upon whether the input and Output are represented by current or voltage. Our analysis reveals that a mixed-mode design, where the input is represented by current but the output is represented by voltage, is less sensitive to mismatch when the amount of smoothing is large. On the other hand, when little smoothing is desired, pure voltage-mode and current-mode designs are preferred. From the point of view of mismatch sensitivity, there is little difference between the two pure-mode designs. Our analysis also reveals that the difference in mismatch sensitivity is due to the vertical resistors, which are the most sensitive to mismatch in all the three designs studied. Copyright (C) 2008 John Wiley & Sons, Ltd.
引用
收藏
页码:53 / 65
页数:13
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