Novel HEMT processing technologies and their circuit applications

被引:0
|
作者
Adesida, I
Mahajan, A
Cueva, G
Fay, P
机构
[1] Univ Illinois, Microelect Lab, Urbana, IL 61801 USA
[2] Univ Illinois, Dept Elect & Comp Engn, Urbana, IL 61801 USA
[3] Univ Notre Dame, Dept Elect Engn, Notre Dame, IN 46556 USA
基金
美国国家科学基金会;
关键词
D O I
10.1016/S0038-1101(99)00071-4
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The monolithic integration of enhancement- and depletion-mode high-electron mobility transistors (E- and D-HEMTs) suitable for high-speed and low power circuit applications in the lattice-matched InP material system is examined. E-HEMT devices with gate-lengths of 0.25, 0.5 and 1.0 mu m fabricated using a buried-Pt gate process demonstrate threshold voltages (V-T) ranging from +200 to +258 mV and maximum extrinsic transconductances (g(mext)) as high as 800 mS mm(-1), while D-HEMT devices of identical gate-lengths exhibited a VT ranging from -599 to -405 mV, and a g(mext) as high as 578 mS mm(-1). The devices showed excellent rf characteristics, exhibiting unity current-gain cutoff frequencies (f(t)) as high as 106 GHz. Based on these results, 11, 23, and 59 stage ring oscillators using direct-coupled FET logic (DCFL) technology were fabricated and characterized. Room temperature propagation delays of 9.27 ps/stage with a power-delay product of 2.37 fJ/stage were achieved. (C) 1999 Elsevier Science Ltd. All rights reserved.
引用
收藏
页码:1333 / 1338
页数:6
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