Analysis of Coupling Capacitance between TSV and Adjacent RDL Interconnections

被引:0
|
作者
Mei, Zheng [1 ]
Dong, Gang [1 ]
机构
[1] Xidian Univ, Sch Microelect, 2 South Taibai Rd, Xian 710071, Shaanxi, Peoples R China
关键词
Coupling capacitance; redistribution layers; three-dimensional (3-D) integrated circuit (IC); through silicon via; SILICON; 3-D; MODEL;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper proposes an equivalent model of the coupling capacitance between TSVs and adjacent RDL. Based on the scalar potential integral equation and cylindrical accumulation mode basis functions, an efficient method of extracting the coupling capacitance is present. The scalability of the proposed model is verified by simulation and our results show that an accuracy of 10% is achieved from the analytic models, compared with the values that were simulated by 3-D numerical field solvers.
引用
收藏
页码:243 / 246
页数:4
相关论文
共 50 条
  • [1] Analysis of the Coupling Capacitance Between TSVs and Adjacent RDL Interconnections
    Mei, Zheng
    Dong, Gang
    Yang, Yintang
    IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, 2019, 61 (02) : 512 - 520
  • [2] Electrical Model Analysis & Measurement of TSV to TSV Coupling Capacitance
    Yang, Shiuan-hau
    Su, Hong-Pin
    Fan, Kuang-Ching
    Lee, Hsin-Hung
    2013 8TH INTERNATIONAL MICROSYSTEMS, PACKAGING, ASSEMBLY AND CIRCUITS TECHNOLOGY CONFERENCE (IMPACT), 2013, : 294 - 297
  • [3] A TSV to TSV, A TSV to Metal Interconnects, and A TSV to Active Device Coupling Capacitance: Analysis and Recommendations
    Salah, Khaled
    2015 10TH IEEE INTERNATIONAL CONFERENCE ON DESIGN & TECHNOLOGY OF INTEGRATED SYSTEMS IN NANOSCALE ERA (DTIS), 2015,
  • [4] Modeling and Analysis of Coupling between TSVs, Metal, and RDL interconnects in TSV-based 3D IC with Silicon Interposer
    Yoon, Kihyun
    Kim, Gawon
    Lee, Woojin
    Song, Taigon
    Lee, Junho
    Lee, Hyungdong
    Park, Kunwoo
    Kim, Joungho
    2009 11TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE (EPTC 2009), 2009, : 702 - +
  • [5] Noise Coupling Analysis between TSV and Active Circuit
    Lee, Manho
    Cho, Jonghyun
    Kim, Joungho
    2012 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM (EDAPS), 2012, : 45 - 48
  • [6] Electrical Measurement and Analysis of TSV/RDL for 3D Integration
    Sun, Xin
    Fang, Runiu
    Zhu, Yunhui
    Zhong, Xiao
    Bian, Yuan
    Ma, Shenglin
    Miao, Min
    Chen, Jing
    Wang, Yan
    Jin, Yufeng
    2014 IEEE 16TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE (EPTC), 2014, : 709 - 712
  • [7] Algorithm for Extracting Parameters of the Coupling Capacitance Hysteresis Cycle for TSV Transient Modeling and Robustness Analysis
    Piersanti, Stefano
    Pellegrino, Enza
    de Paulis, Francesco
    Orlandi, Antonio
    Jung, Daniel H.
    Kim, Dong-Hyun
    Kim, Joungho
    Fan, Jun
    IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, 2017, 59 (04) : 1329 - 1338
  • [8] Modeling and Analysis of Cracked Through Silicon Via (TSV) Interconnections
    Gerakis, Vasileios
    Avdikou, Christina
    Liolios, Alexandros
    Hatzopoulos, Alkis
    PROCEEDINGS OF THE 2014 IEEE 17TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS & SYSTEMS (DDECS), 2014, : 310 - 313
  • [9] High-Frequency Transmission Characteristic Analysis of TSV-RDL Interconnects
    Zhang, Yiming
    Tian, Wenchao
    Wang, Hongyue
    Wang, Lei
    Yang, Zhili
    Shao, Weiheng
    Chen, Zejian
    Zhou, Bin
    IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2024, 14 (01): : 89 - 97
  • [10] Coupling Capacitance Extraction in Through-Silicon Via (TSV) Arrays
    Ramadan, Tarek
    Yahya, Eslam
    Dessouky, Mohamed
    Ismail, Yehea
    2015 IEEE CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS (ICECS), 2015, : 470 - 473