Considerations for the design of switched-capacitor circuits using precise-gain operational amplifiers

被引:1
|
作者
Baschirotto, A
机构
[1] Department of Electronics, Universitâ di Pavia
关键词
D O I
10.1109/82.553398
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Standard design of switched-capacitor (SC) networks assumes operation with infinite gain and infinite bandwidth opamps. However in the opamp design a tradeoff exists between the speed and the gain. As a consequence when a high sampling frequency is used, the needed large bandwidth limits the opamp gain to low values, therefore limiting the achievable accuracy. For this reason standard design is less feasible for high-sampling frequency. For these cases alternative design approaches are needed that address the opamp design tradeoff between speed-and-gain, allowing the frequency range of SC networks to be extended. A possible alternative is the precise opamp gain (FOG) design approach which has been already demonstrated with the realization of a 150 MHz SC filter reported elsewhere. The FOG design approach consists of designing high-frequency SC networks taking into account the precise gain value of the opamps as a parameter in the capacitor design. The standard opamp design tradeoff between speed-and-gain is changed into the FOG design tradeoff between speed-and gain precision which is more affordable in high-frequency opamps. In this brief, the FOG design approach is developed in detail and practical considerations regarding its possibility and limits are reported.
引用
收藏
页码:827 / 832
页数:6
相关论文
共 50 条
  • [41] REALIZATION OF CLOSELY COUPLED INDUCTORS USING SWITCHED-CAPACITOR CIRCUITS
    UENO, F
    INOUE, T
    OOTA, I
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1982, 29 (01): : 52 - 53
  • [42] Switched-capacitor circuits using a single-phase scheme
    Goes, J
    Vaz, B
    Paulino, N
    Pinto, H
    Monteiro, R
    Garçao, AS
    2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS, 2005, : 3123 - 3126
  • [43] SWITCHED-CAPACITOR CIRCUITS USING DELAY-LINE ELEMENTS
    TAN, N
    ERIKSSON, S
    ELECTRONICS LETTERS, 1993, 29 (02) : 159 - 160
  • [44] SWITCHED-CAPACITOR FILTERS - PRECISE, COMPACT, INEXPENSIVE
    SOLOMON, CW
    IEEE SPECTRUM, 1988, 25 (06) : 28 - 32
  • [45] Design technique for mitigation of soft errors in differential switched-capacitor circuits
    Fleming, Patrick R.
    Olson, Brian D.
    Holman, W. Timothy
    Bhuva, Bharat L.
    Massengill, Lloyd W.
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2008, 55 (09) : 838 - 842
  • [46] Systematic method for the design of multiamplifier switched-capacitor FIR decimator circuits
    Franca, J.E.
    Dias, V.F.
    IEE Proceedings, Part G: Circuits, Devices and Systems, 1991, 138 (03): : 307 - 314
  • [47] Design Methodology for Yield Enhancement of Switched-Capacitor Analog Integrated Circuits
    Luo, Pei-Wen
    Chen, Jwu-E
    Wey, Chin-Long
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2011, E94A (01): : 352 - 361
  • [48] Design-oriented estimation of thermal noise in switched-capacitor circuits
    Schreier, R
    Silva, J
    Steensgaard, J
    Temes, GC
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2005, 52 (11): : 2358 - 2368
  • [49] DESIGN OF A HIGH-GAIN, SINGLE-STAGE OPERATIONAL-AMPLIFIER FOR GAAS SWITCHED-CAPACITOR FILTERS
    TOUMAZOU, C
    HAIGH, DG
    ELECTRONICS LETTERS, 1987, 23 (14) : 752 - 754
  • [50] SYSTEMATIC METHOD FOR THE DESIGN OF MULTIAMPLIFIER SWITCHED-CAPACITOR FIR DECIMATOR CIRCUITS
    FRANCA, JE
    DIAS, VF
    IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS, 1991, 138 (03): : 307 - 314