Grating Lobe Reduction in Phased Arrays with Regular Subarray Architecture

被引:0
|
作者
Yan, Fei [1 ]
Yang, Peng [1 ]
Gao, Min [1 ]
Cui, Xuewu [1 ]
Yang, Feng [1 ]
机构
[1] UESTC, Sch Elect Engn, Chengdu, Sichuan, Peoples R China
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Phase weighting at the subarray level alone causes grating lobes (GLs) in the far field pattern. In this paper, a technique for reducing GLs in phased arrays with regular subarray architectures is proposed. Two measures are used in this method. They are: (1) integrating a power divider with phase difference among output ports for each subarray, which controls the each subarray pattern has a different beam direction; (2) switching the subarrays on or off during scanning. The optimization of the beam directions of subarrays is carried out by using particle swarm optimization (PSO) algorithm. Numerical results show that the proposed approach can successfully suppress GLs while maintain the similar beamwidth (BW) with the filled array.
引用
收藏
页码:1597 / 1598
页数:2
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