A Scheme of Test Data Compression and Power Reduction Based on Common-Run-Length Coding (CRLC)

A new scheme of test data compression and power reduction, namely common-run-length coding (CRLC) scheme is presented, which is based on run-length. This scheme uses two shorter codewords to represent the whole second run of two consecutive runs, the lengths of which are the same. Compared with other already known schemes this scheme has some characteristics, such as high compression ratio, low power dissipation, easy control and implementation. The performance of the algorithm is mathematically analyzed and its merits are experimentally confirmed on the larger examples of the ISCAS89 benchmark circuits.