Realization of Subspace-Based Digital Beamformer Using CORDIC Algorithm Based on Software Defined Radio Architecture

被引:0
|
作者
Lin, You-Rong [1 ]
Mar, Jeich [1 ]
机构
[1] Yuan Ze Univ, YZU, Dept Commun Engn, Tao Yuan, Taiwan
关键词
field programmable gate array (FPGA); hardware reconfiguration; multi-function matrix operation (MFMO); subspace digital beamforming (DBF);
D O I
暂无
中图分类号
TN [电子技术、通信技术];
学科分类号
0809 ;
摘要
The reconfigurable multi-function matrix operation (MFMO) module circuits including eigen-value and eigen-vector decomposition (EVD), QR factorization (QRF), linear system solver (LLS), and matrix multiplier (MM) for the software defined radio and cognitive applications are designed using coordinate rotations digital computer (CORIDC) algorithm. The processing time for each scalable NxN MFMO module circuit implemented on the field programmable gate array (FPGA) is formulated. A unitary-ESPRIT (Estimating Signal Parameter via Rotational Invariance Techniques) subspace digital beamformer realized with a set of software-driven MFMO module circuits is used as an example to demonstrate the hardware reconfiguration capability. Based on the requirements of the processing time and the logic resource of the subspace digital beamformer, the proposed MFMO module circuits can be reconfigured via the reconfiguration controller (RC).
引用
收藏
页码:798 / 802
页数:5
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