FPGA-based architecture for real-time data reduction of ultrasound signals

被引:9
|
作者
Soto-Cajiga, J. A. [1 ]
Pedraza-Ortega, J. C. [2 ]
Rubio-Gonzalez, C. [1 ]
Bandala-Sanchez, M. [1 ]
Romero-Troncoso, R. de J. [3 ]
机构
[1] Ctr Ingn & Desarrollo Ind, Queretaro 76130, Qro, Mexico
[2] Univ Autonoma Queretaro, CIDIT Fac Informat, Queretaro 76230, Qro, Mexico
[3] Univ Guanajuato, DICIS, HSPdigital CA Telemat, Salamanca 36885, Gto, Spain
关键词
Ultrasound data reduction; Maxima detection; Real-time data reduction; Hardware-based reduction; FPGA processing; COMPRESSION; INSPECTION;
D O I
10.1016/j.ultras.2011.08.007
中图分类号
O42 [声学];
学科分类号
070206 ; 082403 ;
摘要
This paper describes a novel method for on-line real-time data reduction of radiofrequency (RF) ultrasound signals. The approach is based on a field programmable gate array (FPGA) system intended mainly for steel thickness measurements. Ultrasound data reduction is desirable when: (1) direct measurements performed by an operator are not accessible; (2) it is required to store a considerable amount of data; (3) the application requires measuring at very high speeds; and (4) the physical space for the embedded hardware is limited. All the aforementioned scenarios can be present in applications such as pipeline inspection where data reduction is traditionally performed on-line using pipeline inspection gauges (PIG). The method proposed in this work consists of identifying and storing in real-time only the time of occurrence (TOO) and the maximum amplitude of each echo present in a given RF ultrasound signal. The method is tested with a dedicated immersion system where a significant data reduction with an average of 96.5% is achieved. (C) 2011 Elsevier B.V. All rights reserved.
引用
收藏
页码:230 / 237
页数:8
相关论文
共 50 条
  • [21] A Real-time Updatable FPGA-based Architecture for Fast Regular Expression Matching
    Tang, Qiu
    Jiang, Lei
    Liu, Xin-xing
    Dai, Qiong
    2ND INTERNATIONAL CONFERENCE ON INFORMATION TECHNOLOGY AND QUANTITATIVE MANAGEMENT, ITQM 2014, 2014, 31 : 852 - 859
  • [22] An FPGA-based coprocessor for real-time fieldbus traffic scheduling - architecture and implementation
    Martins, E
    Almeida, L
    Fonseca, JA
    JOURNAL OF SYSTEMS ARCHITECTURE, 2005, 51 (01) : 29 - 44
  • [23] Design and Implementation of an FPGA-Based DNN Architecture for Real-time Outlier Detection
    Mohamed, Nadya
    Cavallaro, Joseph
    JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2023, 95 (07): : 845 - 861
  • [24] FPGA-Based Platform for Real-Time Internet
    Wielgosz, Maciej
    Panggabean, Mauritz
    Chilwan, Ameen
    Ronningen, Leif Arne
    2012 THIRD INTERNATIONAL CONFERENCE ON EMERGING SECURITY TECHNOLOGIES (EST), 2012, : 131 - 134
  • [25] Design and Implementation of an FPGA-Based DNN Architecture for Real-time Outlier Detection
    Nadya Mohamed
    Joseph Cavallaro
    Journal of Signal Processing Systems, 2023, 95 : 845 - 861
  • [26] An FPGA-Based Real-Time Event Sampler
    Penneman, Niels
    Perneel, Luc
    Timmerman, Martin
    De Sutter, Bjorn
    RECONFIGURABLE COMPUTING: ARCHITECTURES, TOOLS AND APPLICATIONS, 2010, 5992 : 364 - +
  • [27] Real time FPGA-based architecture for video applications
    Saldana, Griselda
    Arias-Estrada, Miguel
    RECONFIG 2006: PROCEEDINGS OF THE 2006 IEEE INTERNATIONAL CONFERENCE ON RECONFIGURABLE COMPUTING AND FPGA'S, 2006, : 217 - +
  • [28] FPGA-based real-time data processing for accelerating reconstruction at LHCb
    Lazzari, F.
    Baldini, W.
    Bassi, G.
    Contu, A.
    Dorigo, M.
    Fantechi, R.
    Giambastiani, L.
    Morello, M. J.
    Punzi, G.
    Sticchi, M.
    Tuci, G.
    JOURNAL OF INSTRUMENTATION, 2022, 17 (04)
  • [29] Real-time FPGA-based architecture for bicubic interpolation:: An application for digital image scaling
    Nuño-Maganda, MA
    Arias-Estrada, MO
    2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2005), 2005, : 1 - 8
  • [30] A Real-Time FPGA-Based Architecture for a Reinhard-like Tone Mapping Operator
    Hassan, F.
    Carletta, J. E.
    GRAPHICS HARDWARE 2007: ACM SIGGRAPH / EUROGRAPHICS SYMPOSIUM PROCEEDINGS, 2007, : 65 - 72