InAs/GaSb Vertical Nanowire TFETs on Si for Digital and Analogue Applications

被引:0
|
作者
Memisevic, E. [1 ]
Svensson, J. [1 ]
Lind, E. [1 ]
Wernersson, L. -E. [1 ]
机构
[1] Lund Univ, Dept Elect & Informat Technol, Lund, Sweden
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Vertical InAs/GaSb nanowire TFETs with diameters of 20 nm and 25 nm have been fabricated and characterized. The influence of diameter, gate-placement, and nanowire numbers have been studied. The best device shows a subthreshold swing of 68 mV/dec at V-DS = 0.3 V and 26 mu A/mu m at V-DS = 0.3 V and V-GS = 0.5 V. It achieves a self-gain larger than 100 with high transconductance efficiency.
引用
收藏
页码:154 / 155
页数:2
相关论文
共 50 条
  • [1] Study of Inherent Gate Coupling Nonuniformity of InAs/GaSb Vertical TFETs
    Hsu, Ching-Yi
    Zeng, Yuping
    Chang, Chen-Yen
    Hu, Chenming
    Chang, Edward Yi
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2016, 63 (11) : 4267 - 4272
  • [2] Scaling of Vertical InAs-GaSb Nanowire Tunneling Field-Effect Transistors on Si
    Memisevic, Elvedin
    Svensson, Johannes
    Hellenbrand, Markus
    Lind, Erik
    Wernersson, Lars-Erik
    IEEE ELECTRON DEVICE LETTERS, 2016, 37 (05) : 549 - 552
  • [3] MBE growth and digital etch of GaSb/InAs nanowires on Si for logic applications
    Dropiewski, Katherine
    Tokranov, Vadim
    Yakimov, Michael
    Oktyabrsky, Serge
    Bentley, Steven
    Galatage, Rohit
    JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 2017, 35 (02):
  • [4] Source-Underlapped GaSb-InAs TFETs With Applications to Gain Cell Embedded DRAMs
    Sharma, Ankit
    Akkala, Arun Goud
    Kulkarni, Jaydeep P.
    Roy, Kaushik
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2016, 63 (06) : 2563 - 2569
  • [5] Effect of Surface Roughness and Phonon Scattering on Extremely Narrow InAs-Si Nanowire TFETs
    Carrillo-Nunez, Hamilton
    Rhyner, Reto
    Luisier, Mathieu
    Schenk, Andreas
    2016 46TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC), 2016, : 188 - 191
  • [6] InAs-GaSb/Si Heterojunction Tunnel MOSFETs: An Alternative to TFETs as Energy-Efficient Switches?
    Carrillo-Nunez, Hamilton
    Luisier, Mathieu
    Schenk, Andreas
    2015 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2015,
  • [7] Improved Electrostatics through Digital Etch Schemes in Vertical GaSb Nanowire p-MOSFETs on Si
    Zhu, Zhongyunshen
    Jonsson, Adam
    Liu, Yen-Po
    Svensson, Johannes
    Timm, Rainer
    Wernersson, Lars-Erik
    ACS APPLIED ELECTRONIC MATERIALS, 2022, 4 (01) : 531 - 538
  • [8] Vertical InAs Nanowire Wrap Gate Transistors on Si Substrates
    Rehnstedt, Carl
    Martensson, Thomas
    Thelander, Claes
    Samuelson, Lars
    Wernersson, Lars-Erik
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2008, 55 (11) : 3037 - 3041
  • [9] Tuning of Source Material for InAs/InGaAsSb/GaSb ApplicationSpecific Vertical Nanowire Tunnel FETs
    Krishnaraja, Abinaya
    Svensson, Johannes
    Memisevic, Elvedin
    Zhu, Zhongyunshen
    Persson, Axel R.
    Lind, Erik
    Wallenberg, Lars Reine
    Wernersson, Lars-Erik
    ACS APPLIED ELECTRONIC MATERIALS, 2020, 2 (09) : 2882 - 2887
  • [10] Spontaneous growth of an InAs nanowire lattice in an InAs/GaSb superlattice
    Nosho, BZ
    Bennett, BR
    Whitman, LJ
    Goldenberg, M
    APPLIED PHYSICS LETTERS, 2002, 81 (23) : 4452 - 4454