A 10-bit Asynchronous SAR ADC with Scalable Conversion Time in 0.18μm CMOS

被引：0
|
作者：
Tung, Po-Chiang
Fan, Duen-Ting
Tsai, Tsung-Heng [1 ]
机构：
[1] Natl Chung Cheng Univ, Dept Elect Engn, Chiayi, Taiwan
来源：
2016 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2016年
关键词：
Metastability; Low power; Low voltage; SAR ADC; Asynchronous;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, a 10b 100-to-500 kS/s asynchronous SAR ADC is proposed and prototyped in 0.18 mu m CMOS. The supply voltage is scaled down appropriately for different sampling speeds to minimize the power consumption. At a 0.5-V supply voltage and a 100 kS/s sampling rate, the ADC achieves a signal-to-noise and distortion ratio of 56.35 dB and consumes 424 nW, resulting in a figure of merit of 7.9 fJ/conversion-step. The ADC core occupies an active area of only 0.077 mm(2).
引用
收藏
页码：1454 / 1457
页数：4
相关论文
共 50 条
  • [21] Design of a low power 10-bit 12MS/s asynchronous SAR ADC in 65nm CMOS
    Campos, Arthur Lombardi
    Navarro, Joao
    Luppe, Maximiliam
    2019 32ND SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN (SBCCI 2019), 2019,
  • [22] A 10-bit 50-MS/s reference-free low power SAR ADC in 0.18-mu m SOI CMOS technology
    Ning, Qiao
    Zhang Guoquan
    Bo, Yang
    Liu Zhongli
    Fang, Yu
    JOURNAL OF SEMICONDUCTORS, 2012, 33 (09)
  • [23] A 10-bit 100-MS/s Power-Efficient Asynchronous SAR ADC
    Zhang, Beichen
    Yao, Bingbing
    Liu, Liyuan
    Wu, Nanjian
    2016 13TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT), 2016, : 722 - 724
  • [24] A 0.5-V 10-bit Asynchronous SAR ADC with Monotonic Switching for Biomedical Applications
    Rodrigues, Martina C.
    Brum, Joao Lucas J.
    Girardi, Alessandro G.
    Severo, Lucas C.
    de Aguirre, Paulo Cesar C.
    2023 ARGENTINE CONFERENCE ON ELECTRONICS, CAE, 2023, : 107 - 111
  • [25] A Design of 10-Bit Asynchronous SAR ADC with an On-Chip Bandgap Reference Voltage Generator
    Verma, Deeksha
    Shehzad, Khuram
    Kim, Sung Jin
    Pu, Young Gun
    Yoo, Sang-Sun
    Hwang, Keum Cheol
    Yang, Youngoo
    Lee, Kang-Yoon
    SENSORS, 2022, 22 (14)
  • [26] A low-power 10-bit 250 MS/s dual-channel pipeline ADC in 0.18 μm CMOS
    Fan, Q.
    Chen, J.
    Wen, X.
    Feng, Y.
    Tang, Y.
    Zuo, Z.
    Gong, D.
    Liu, T.
    Ye, J.
    JOURNAL OF INSTRUMENTATION, 2017, 12
  • [27] An 8-bit 10 kS/s 0.18 μm CMOS SAR ADC for RFID applications with sensing capabilities
    Marjonen, J.
    Pesonen, N.
    Vermesan, O.
    Aberg, M.
    Oja, A.
    Rustad, H.
    Rusu, C.
    Enoksson, P.
    2007 NORCHIP, 2007, : 100 - +
  • [28] A 10 bit 50 MS/s SAR ADC with partial split capacitor switching scheme in 0.18 μm CMOS
    李冬
    孟桥
    黎飞
    Journal of Semiconductors, 2016, 37 (01) : 110 - 116
  • [29] A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS Process
    Liu, Chun-Cheng
    Chang, Soon-Jyh
    Huang, Guan-Ying
    Lin, Yin-Zu
    2009 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2009, : 236 - 237
  • [30] A 10 bit 50 MS/s SAR ADC with partial split capacitor switching scheme in 0.18 μm CMOS
    李冬
    孟桥
    黎飞
    Journal of Semiconductors, 2016, (01) : 110 - 116
12345