3D-Stacked Vertical Channel Nonvolatile Polymer Memory

被引：18
|
作者：
Hwang, Sun Kak [1 ]
Cho, Suk Man [1 ]
Kim, Kang Lib [1 ]
Park, Cheolmin [1 ]
机构：
[1] Yonsei Univ, Dept Mat Sci & Engn, Seoul 120749, South Korea
来源：
ADVANCED ELECTRONIC MATERIALS | 2015年 / 1卷 / 1-2期
基金：
新加坡国家研究基金会;
关键词：
LOW-VOLTAGE; TRANSISTOR MEMORIES; SEMICONDUCTOR; NANOPARTICLES; FILMS;
D O I：
10.1002/aelm.201400042
中图分类号：
TB3 [工程材料学];
学科分类号：
0805 ; 080502 ;
摘要：
A 3D-stacked one transistor memory with vertically defined submicrometer channels is realized by carefully designing device architecture involving repetitive deposition of layers in combination with a one-step bilayer transfer of a ferroelectric layer and a semiconducting one. The devices represent a milestone in the realization of mechanically flexible, one-transistor polymer memory with high memory performance.
引用
收藏
页数：7
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