Advanced failure detection techniques in deep submicron CMOS integrated circuits

被引:0
|
作者
Rubio, A [1 ]
Altet, J [1 ]
Mateo, D [1 ]
机构
[1] Univ Politecn Cataluna, Dept Elect Engn, Grp Design & Test High Performance Circuits, ES-08034 Barcelona, Spain
关键词
D O I
10.1016/S0026-2714(99)00122-5
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The test of present integrated circuits exhibits many confining aspects, among them the adequate selection of the observable variables, the use of combined testing approaches, an each time more restricted controllability and observability (physically and electrically) and finally the required testing time. In the paper these points are discussed and different nowadays-promising techniques exposed. Complementarily to the logic output variable analysis (both value and delay) three efficient detection and localisation techniques can be considered that are contemplated in this work: the detection of light, heat and leakage currents due to the presence of failures. In most of the cases it is not possible to differentiate clearly, like was in the past, the production testing, the in-field testing, the test and the localisation of the failure, making each time closer the fields of testing and failure analysis. (C) 1999 Elsevier Science Ltd. All rights reserved.
引用
收藏
页码:909 / 918
页数:10
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