SiCMOS process-compatible guided-wave optical interconnects

We report the formation of polyimide-based H-tree waveguides for a multi-GBit/sec optical clock signal distribution in a Si CMOS process compatible environment. Such a clock distribution system is to replace the existing electronic counterpart associated with high-speed supercomputers such as Gray T-90 machine. A waveguide propagation loss of 0.21 dB/cm at 850 nm was experimentally confirmed for the 1-to-48 waveguide fanout device. The planarization requirement of the optical interconnection layer among many electrical interconnection layers makes the employment of tilted grating a choice of desire. Theoretical calculation predicts the 1-to-1 free-space to waveguide coupling with an efficiency as high as 95%. Currently, a coupling efficiency of 35% was experimentally confirmed due to the limited index difference between guiding and cladding layers. Further experiments aimed at structuring a larger guiding/cladding layer index differences are under investigation. To effectively couple an optical signal into the waveguide through the titled grating coupler, the accuracy of the wavelength employed is pivotal. This makes the usage of the vertical cavity surface-emitting lasers (VCSELs) and VCSEL arrays the best choice when compared with edge-emitting lasers. Modulation bandwidth as high as 6 GHz was demonstrated at 850 nm. Such a wavelength is compatible with Si-based photodetectors. The speed and complexity of integrated circuits are increased rapidly as integrated circuit technology advances from very large scale integrated (VLSI) circuits to ultra large scale integrated (ULSI) circuits. As the number of components per chip, the number of chips per board, the modulation speed and the degree of integration continue to increase, electrical interconnects are facing their fundamental bottle-necks, such as speed, packaging, fanout, and power dissipation. Multichip module (MCM) technology is employed to provide higher clock speeds and circuit densities[1,2]. However, the state-of-the-art technologies based on electrical interconnects fail to provide the required multi-GBit/sec clock speed and communication distance in intra-MCM and inter-MCM hierarchies. For a multiprocessor computer system, such as a Gray T-90 supercomputer, it is extremely difficult to obtain high-speed (>500 MHz) synchronous clock distribution using electrical interconnections due to large fanouts (48x2) and long interconnection lengths (>15 cm)[3-7]. A fanout chip is required to provide the massive electrical fanout. The synchronous global clock signal distribution is highly desirable to simplify the architecture and enable a higher speed performance. High-speed, large-area massive fanout optoelectronic interconnects may overcome many of the problems associated with electrical interconnects in this interconnection scenario[3-11]. An array of novel optical interconnect architecture has been proposed and then demonstrated by earlier researchers[11-14], which may partially satisfy the above requirements for a massive clock signal distribution in intra-MCM and inter-MCM hierarchies.