Automatic abstraction for verification of timed circuits and systems

被引：0
|
作者：
Zheng, H [1 ]
Mercer, E [1 ]
Myers, C [1 ]
机构：
[1] Univ Utah, Salt Lake City, UT 84112 USA
来源：
COMPUTER AIDED VERIFICATION, PROCEEDINGS | 2001年 / 2102卷
关键词：
D O I：
暂无
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
This paper presents a new approach for verification of asynchronous circuits by using automatic abstraction. It attacks the state explosion problem by avoiding the generation of a flat state space for the whole design. Instead, it breaks the design into blocks and conducts verification on each of them. Using this approach, the speed of verification improves dramatically.
引用
收藏
页码：182 / 193
页数：12
相关论文
共 50 条
  • [41] Incremental Inductive Verification of Parameterized Timed Systems
    Isenberg, Tobias
    ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, 2017, 16 (02)
  • [42] Verification of continuous dynamical systems by timed automata
    Christoffer Sloth
    Rafael Wisniewski
    Formal Methods in System Design, 2011, 39 : 47 - 82
  • [43] Symbolic Verification and Analysis of Discrete Timed Systems
    Jürgen Ruf
    Thomas Kropf
    Formal Methods in System Design, 2003, 23 : 67 - 108
  • [44] Learning Assumptions for Compositional Verification of Timed Systems
    Lin, Shang-Wei
    Andre, Etienne
    Liu, Yang
    Sun, Jun
    Dong, Jin Song
    IEEE TRANSACTIONS ON SOFTWARE ENGINEERING, 2014, 40 (02) : 137 - 153
  • [45] Interval approach to parallel timed systems verification
    Karpov, YG
    Sotnikov, D
    PARALLEL COMPUTING TECHNOLOGIES, PROCEEDINGS, 2003, 2763 : 100 - 116
  • [46] Incremental Inductive Verification of Parameterized Timed Systems
    Isenberg, Tobias
    2015 15TH INTERNATIONAL CONFERENCE ON APPLICATIONS OF CONCURRENCY TO SYSTEM DESIGN (ACSD), 2015, : 1 - 9
  • [47] Verification of continuous dynamical systems by timed automata
    Sloth, Christoffer
    Wisniewski, Rafael
    FORMAL METHODS IN SYSTEM DESIGN, 2011, 39 (01) : 47 - 82
  • [48] On the verification of detectability for timed discrete event systems
    Dong, Weijie
    Zhang, Kuize
    Li, Shaoyuan
    Yin, Xiang
    AUTOMATICA, 2024, 164
  • [49] Formal verification of timed systems: A survey and perspective
    Wang, F
    PROCEEDINGS OF THE IEEE, 2004, 92 (08) : 1283 - 1305
  • [50] Automatic datapath abstraction in hardware systems
    Hojati, R
    Brayton, RK
    COMPUTER AIDED VERIFICATION, 1995, 939 : 98 - 113
12345