Direct Digital-Frequency Synthesizer for Dielectrophoresis

被引：0

作者：

Heredia, F. ^{[1
]}

Carbajal, C. ^{[1
]}

Martinez, S. ^{[1
]}

机构：

[1] ITESM Estado Mexico, Dept Elect Engn, Mexico City, DF, Mexico

来源：

CERMA 2008: ELECTRONICS, ROBOTICS AND AUTOMOTIVE MECHANICS CONFERENCE, PROCEEDINGS | 2008年

关键词：

direct digital frequency synthesizer; FPGA implementation; dielectrophoresis; PHASE;

D O I：

10.1109/CERMA.2008.58

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

It is common practice to use sinusoidal signals for generating the electric fields needed for particle manipulation using dielectrophoresis (DEP). A Direct Digital Frequency Synthesizer (DFFS) is well suited for this application because of its fast switching speed, high resolution, small size and low power. The focus of this paper is on design, analysis, simulation and implementation of a DDFS, using Altera tools. The proposed architecture uses a unipolar digital-to-analog converter (DAC). Memory size is reduced more than 75 percent using quadrant compression. To decrease the amount of hardware even further, the phase generated by the phase accumulator is truncated before it is used by the ROM. Dither is added in order to get higher spurious free dynamic range. Further reduction is achieved storing in the ROM only the difference between the sinusoidal function and the phase.

引用

页码：570 / 574

页数：5

共 50 条

[31] A Direct Digital Frequency Synthesizer Based on a New Form of Polynomial Approximations
Chen, Yao-Hua
Chau, Yawgeng A.
IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, 2010, 56 (02) : 436 - 440
[32] A 250MHz direct digital frequency synthesizer with ΣΔ noise shaping
Song, YC
Kim, B
2003 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE: DIGEST OF TECHNICAL PAPERS, 2003, 46 : 472 - +
[33] A high SFDR Direct Digital Synthesizer with frequency error free output
Zhang, Kai
Huang, Xinming
PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10, 2008, : 3138 - 3141
[34] Spectral characteristics of a direct digital frequency synthesizer in a residual class system
Ovcharenko, LA
Bazhenov, AA
IZVESTIYA VYSSHIKH UCHEBNYKH ZAVEDENII RADIOELEKTRONIKA, 2003, 46 (9-10): : 53 - 60
[35] Alternative direct digital frequency synthesizer architectures with reduced memory size
Soudris, D
Kesoulis, M
Koukourlis, C
Thanailakis, A
Blionas, S
PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II: COMMUNICATIONS-MULTIMEDIA SYSTEMS & APPLICATIONS, 2003, : 73 - 76
[36] A virtual orthogonal output direct digital frequency synthesizer design and implementation
Wu, Chang
Lan, Zhong-Wen
Jia, Ke-lin
Bi, Chuang
ASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2007, : 344 - 347
[37] Design of a direct digital frequency synthesizer based on least square approximation
National 'ASIC System' Engineering and Technology Research Centre, Southeast University, Nanjing 210096, China
Guti Dianzixue Yanjiu Yu Jinzhan, 2006, 4 (522-526):
[38] Design of Virtual Quadrature Direct Digital Frequency Synthesizer Using LabVIEW
Zheng Feiyan
Wu Chang
Wang Haocai
Lan Zhongwen
PROCEEDINGS OF THE SECOND INTERNATIONAL SYMPOSIUM ON TEST AUTOMATION & INSTRUMENTATION, VOLS 1-2, 2008, : 301 - 306
[39] A novel method to calculate frequency control word of direct digital synthesizer
Jian, Guo
Jie, Zhu
Jun, Liu
Li, Zhou
MANUFACTURING SYSTEMS AND INDUSTRY APPLICATIONS, 2011, 267 : 433 - 437
[40] DIRECT DIGITAL FREQUENCY SYNTHESIZER WITH CASCADED PHASE AND AMPLITUDE ERROR FEEDBACK
Teodoru, Emil
16TH INTERNATIONAL CONFERENCE THE KNOWLEDGE-BASED ORGANIZATION: APPLIED TECHNICAL SCIENCES AND ADVANCED MILITARY TECHNOLOGIES, CONFERENCE PROCEEDINGS 3, 2010, : 155 - 158

← 1 2 3 4 5 →