Direct Digital-Frequency Synthesizer for Dielectrophoresis

被引:0
|
作者
Heredia, F. [1 ]
Carbajal, C. [1 ]
Martinez, S. [1 ]
机构
[1] ITESM Estado Mexico, Dept Elect Engn, Mexico City, DF, Mexico
关键词
direct digital frequency synthesizer; FPGA implementation; dielectrophoresis; PHASE;
D O I
10.1109/CERMA.2008.58
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
It is common practice to use sinusoidal signals for generating the electric fields needed for particle manipulation using dielectrophoresis (DEP). A Direct Digital Frequency Synthesizer (DFFS) is well suited for this application because of its fast switching speed, high resolution, small size and low power. The focus of this paper is on design, analysis, simulation and implementation of a DDFS, using Altera tools. The proposed architecture uses a unipolar digital-to-analog converter (DAC). Memory size is reduced more than 75 percent using quadrant compression. To decrease the amount of hardware even further, the phase generated by the phase accumulator is truncated before it is used by the ROM. Dither is added in order to get higher spurious free dynamic range. Further reduction is achieved storing in the ROM only the difference between the sinusoidal function and the phase.
引用
收藏
页码:570 / 574
页数:5
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