SICOSYS: An integrated framework for studying interconnection network performance in multiprocessor systems

被引：45

作者：

Puente, V ^{[1
]}

Gregorio, JA ^{[1
]}

Beivide, R ^{[1
]}

机构：

[1] Univ Cantabria, Comp Architecture Grp, Cantabria, Spain

来源：

10TH EUROMICRO WORKSHOP ON PARALLEL, DISTRIBUTED AND NETWORK-BASED PROCESSING, PROCEEDINGS | 2002年

关键词：

D O I：

10.1109/EMPDP.2002.994207

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

An environment has been developed which is capable of determining the impact that a multiprocessor interconnection subsystem causes on real application execution time, A general-purpose interconnection network simulator, called SICOSYS, able to capture essential aspects of the low-level implementation, has been integrated into two execution driven simulators for multiprocessors: RSIM and SimOS. The enhancement of both tools allows the analysis of new proposals for the interconnection subsystem of a cc-NUAM machine, from the VLSI level up to the real application level. Any new proposal can be translated to a specific message router architecture and by using a low-level implementation tool, the parameter delays of a detailed router model to he used by SICOSYS can he obtained.

引用

页码：15 / 22

页数：8

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