共 50 条
- [41] A High Performance Unified BCD and Binary Adder/Subtractor 2009 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, 2009, : 211 - +
- [45] A HIGH PERFORMANCE BINARY TO BCD CONVERTER FOR DECIMAL MULTIPLICATION 2010 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AUTOMATION AND TEST (VLSI-DAT), 2010, : 315 - 318
- [46] SIMPLE BINARY-TO-BCD CONVERTER CAN BE EXPANDED ELECTRONIC ENGINEERING, 1976, 48 (579): : 17 - 17
- [48] Fast & Energy Efficient Binary to BCD Converter with Complement Based Logic Design (CBLD) for BCD Multipliers 2019 IEEE 9TH ANNUAL COMPUTING AND COMMUNICATION WORKSHOP AND CONFERENCE (CCWC), 2019, : 426 - 434
- [50] All-Optical Binary Coded Decimal (BCD) Adder 2009 4TH INTERNATIONAL CONFERENCE ON COMPUTERS AND DEVICES FOR COMMUNICATION (CODEC 2009), 2009, : 292 - +