Fabrication of sub-quarter-micron grating patterns by employing DUV holographic lithography

被引：1
|
作者：
Wang, LA
Lin, CH
Chen, JH
机构：
[1] Inst. of Electro-Optical Engineering, National Taiwan University, Taipei
来源：
MICROELECTRONIC ENGINEERING | 1999年 / 46卷 / 1-4期
关键词：
D O I：
10.1016/S0167-9317(99)00057-X
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Sub-quarter-micron grating patterns with period as fine as 0.22 mu m have been obtained by combining DUV holographic lithography and silylation technique for the first time. A traditional chemical amplified resist (JSR KRF/K2G) originally working for single layer process at 248 nm wavelength was used for silylation. The silylation selectivity was improved by process control and a photoresist pattern with an aspect ration of 4 was obtained.
引用
收藏
页码：173 / 177
页数：5
相关论文
共 50 条
  • [21] Strain induced by Ti salicidation in sub-quarter-micron CMOS devices, as measured by TEM/CBED
    Benedetti, A
    Cullis, AG
    Armigliato, A
    Balboni, R
    Frabboni, S
    Mastracchio, GF
    Pavia, G
    APPLIED SURFACE SCIENCE, 2002, 188 (1-2) : 214 - 218
  • [22] Low Noise Performances of Scalable Sub-quarter-micron GaN HEMT with Field Plate technology
    Peroni, Marco
    Nanni, Antonio
    Romanini, Paolo
    Dominijanni, Donatella
    Notargiacomo, A.
    Giovine, E.
    Ciccognani, Walter
    Colangeli, Sergio
    2011 6TH EUROPEAN MICROWAVE INTEGRATED CIRCUIT CONFERENCE, 2011, : 344 - 347
  • [23] Channel engineering in sub-quarter-micron MOSFETs using nitrogen implantation for low voltage operation
    Furukawa, A
    Abe, Y
    Shimizu, S
    Kuroi, T
    Tokuda, Y
    Inuishi, M
    1996 SYMPOSIUM ON VLSI TECHNOLOGY: DIGEST OF TECHNICAL PAPERS, 1996, : 62 - 63
  • [24] Ultrathin Ox/Nitride gate stack for sub-quarter-micron CMOS devices prepared by RTCVD
    Wang, MF
    Chen, CH
    Yu, MC
    Hou, TH
    Lin, YM
    Chen, SC
    Fang, YK
    Yu, CH
    Liang, MS
    2001 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS, AND APPLICATIONS, PROCEEDINGS OF TECHNICAL PAPERS, 2001, : 208 - 211
  • [25] NEW NEGATIVE TONE RESISTS FOR SUB-QUARTER MICRON LITHOGRAPHY
    SACHDEV, H
    KWONG, R
    HUANG, W
    KATNANI, A
    SACHDEV, K
    MICROELECTRONIC ENGINEERING, 1995, 27 (1-4) : 393 - 396
  • [26] NANOFABRICATION OF GRATING AND DOT PATTERNS BY ELECTRON HOLOGRAPHIC LITHOGRAPHY
    OGAI, K
    KIMURA, Y
    SHIMIZU, R
    FUJITA, J
    MATSUI, S
    APPLIED PHYSICS LETTERS, 1995, 66 (12) : 1560 - 1562
  • [27] High-speed and low-power interconnect technology for sub-quarter-micron ASIC's
    Miyamoto, M
    Takeda, T
    Furusawa, T
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1997, 44 (02) : 250 - 256
  • [28] Simulation study on comparison between metal gate and polysilicon gate for sub-quarter-micron MOSFET's
    Abe, Y
    Oishi, T
    Shiozawa, K
    Tokuda, Y
    Satoh, S
    IEEE ELECTRON DEVICE LETTERS, 1999, 20 (12) : 632 - 634
  • [29] Sub-quarter-micron Pt etching technology using electron beam resist with round-head
    Yunogami, T
    Kumihashi, T
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1998, 37 (12B): : 6934 - 6938
  • [30] Corrosion in aluminum chemical mechanical planarization for sub-quarter-micron dynamic random access memory devices
    Kim, JJ
    Kim, JY
    Jeong, CH
    Park, NH
    Han, SB
    Park, JW
    Lee, WJ
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 2002, 41 (2A): : 925 - 929
12345