System LSI: Challenges and opportunities

被引：0
|
作者：
Kuroda, T [1 ]
机构：
[1] Keio Univ, Yokohama, Kanagawa 2238522, Japan
来源：
IEICE TRANSACTIONS ON ELECTRONICS | 2006年 / E89C卷 / 03期
关键词：
CMOS; scaling; power aware; IC design; computing; communications;
D O I：
10.1093/ietele/e89-c.3.213
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Scaling of CMOS Integrated Circuit is becoming difficult, due mainly to rapid increase in power dissipation. How will the semiconductor technology and industry develop? This paper discusses challenges and opportunities in system LSI from three levels of perspectives: transistor level (physics), IC level (electronics), and business level (economics).
引用
收藏
页码：213 / 220
页数：8
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