A 20-GHz Multi-Core Digitally Controlled Oscillator with-118 dBc/Hz Phase Noise at 1MHz Offset in 28nm CMOS

被引：0

作者：

Apostolina, Ioanna ^{[1
]}

Manstretta, Danilo ^{[1
]}

机构：

[1] Univ Pavia, Microlab, Pavia, Italy

来源：

2023 18TH CONFERENCE ON PH.D RESEARCH IN MICROELECTRONICS AND ELECTRONICS, PRIME | 2023年

关键词：

D O I：

10.1109/PRIME58259.2023.10161852

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper introduces a 20 GHz multi-core digitally controlled oscillator (DCO) designed for high-speed and high-precision radar applications. The multi-core architecture provides superior output power, lower phase noise, and better stability compared to a single-core oscillator. Fabricated using a 28nm CMOS process, the oscillator comprises four identical cores and exhibits excellent phase noise performance, with a value of -118 dBc/Hz at 1 MHz offset from 19.5 GHz, 18% tuning range and 189.6 Figure of Merit (FoM).

引用

页码：133 / 136

页数：4

共 25 条

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2024 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM, RFIC 2024, 2024, : 95 - 98
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