A real-time SVM-based hardware accelerator for hyperspectral images classification in FPGA

被引:0
|
作者
Martins, Lucas Amilton [1 ]
Viel, Felipe [1 ,2 ]
Seman, Laio Oriel [2 ]
Bezerra, Eduardo Augusto [2 ]
Zeferino, Cesar Albenes [1 ]
机构
[1] Univ Vale Itajai UNIVALI, Polytech Sch, Itajai, Brazil
[2] Fed Univ Santa Catarina UFSC, Dept Elect Engn, Florianopolis, Brazil
关键词
Remote sensing; Hyperspectral imaging; Machine learning; Classification; Hardware acceleration; FPGA; IMPLEMENTATION; ALGORITHM; SELECTION; CNN;
D O I
10.1016/j.micpro.2023.104998
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Hyperspectral imaging can be conceptualized as a three-dimensional dataset of spectral information related to a particular landscape. Generally speaking, these are aerial photographs captured by Earth observation satellites. A useful analogy for a hyperspectral image is one of a cube formed with the image acquired along the X and Y axes and a third dimension of spectral bands of varying wavelengths. Given the wealth of data contained within these images, they have been employed in both civilian and military applications such as terrain recognition, urban development supervision, recognition of rare minerals, and various other objectives. The increased utilization of these images has garnered the interest of researchers striving to create solutions that may enable faster processing of the images via parallel processing. In this context, FPGA technology is an option capable of facilitating the implementation of such a system for observation satellites. This research is situated within this framework and aims to develop an FPGA-synthesized hardware accelerator to facilitate real -time hyperspectral image categorization. By taking this approach, hardware-specific solutions can be implemented for embedded applications that process hyperspectral images and can also be integrated with further image processing steps. The proposed accelerator was constructed based on an advanced algorithmic model, resulting in outcomes consistent with those generated by the software -based solution. The experimental results demonstrate that the engineered accelerator can attain a pixel classification time equal to or less than the pixel acquisition time, thus conforming to the real -time processing criteria concerning classification time. Further, the manufactured accelerator exhibits scalability that can classify distinct datasets with varying classes concurrently while maintaining a uniform logic resource utilization.
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页数:12
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