FPGA Crystal Oscillator Circuit Emulation Based on Wave Digital Filter

The design cycle of analog and mixed signal (AMS) components requires the designer to iteratively perform analog simulations, layout, fabrication, and hardware testing. Unlike digital designs, system verification is a difficult task in analog designs, primarily due to a lack of emulation. Thus, a method to emulate AMS components on digital hardware would be highly beneficial. In this work, a high-quality factor crystal oscillator circuit is implemented on a Xilinx Vertex 7 field-programmable gate array (FPGA) using the wave digital filter (WDF) based model with a nonlinear lookup table for modeling transistor characteristics. The number of required hardware resources was minimized while ensuring that the accuracy of the emulation shows an almost perfect match with the SPICE simulations. The WDF model was designed with a tree structure so that it only requires 32 clock cycles to compute a complete sample. The resulting emulation computes a sample at 18.75 MHz while running on an FPGA with a 600 MHz clock.