A New Switched Capacitor Based Multi-Level Inverter with Fewer Capacitors

被引:9
|
作者
Singh, Ashutosh Kumar [1 ]
Mandal, Rajib Kumar [1 ]
机构
[1] Natl Inst Technol Patna, Dept Elect Engn, Patna 800005, Bihar, India
关键词
Seventeen-Level; switched capacitor; high gain; single DC source; PWM; REDUCED NUMBER; DC SOURCES; TOPOLOGY; CONVERTERS; VOLTAGE; CONNECTION; COMPONENTS; DESIGN; MODULE;
D O I
10.1080/00207217.2022.2094472
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This article introduces a new multilevel that is 17-level inverter. This circuit contains 14 switches, 2 diodes, 3 capacitors and a DC source. Each cycle contains 18 steps, including two steps at the zero crossing. Due to the self-polarity nature of the proposed topology, no H-bridge is necessary. The pulse width modulation approach is used to generate gate pulses from logic gates while also balancing the power across the capacitors. A prototype is constructed to experimentally verify the result. The superiority of this topology is demonstrated by comparison with other similar-level topologies. In addition, a diode and an inductor are connected in a way that reduces the short-circuit capacitance current.
引用
收藏
页码:1393 / 1407
页数:15
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