A Real-Time Edge-Detection CMOS Image Sensor for Machine Vision Applications

被引:8
|
作者
Park, Min-Jun [1 ]
Kim, Hyeon-June [1 ]
机构
[1] Seoul Natl Univ Sci & Technol, Dept Semicond Engn, Seoul 01811, South Korea
基金
新加坡国家研究基金会;
关键词
CMOS image sensor (CIS); column-parallel (CP) imaging structure; edge-detection counter; on-chip edge image extraction; single-slope analog-to-digital convertor (SS ADC); variable edge thresholding; SINGLE-SLOPE ADC; MOTION; DESIGN;
D O I
10.1109/JSEN.2023.3263461
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This article presents a real-time edge image extraction CMOS image sensor (CIS) with an edge-detection counter for machine vision applications. By examining a conventional column-parallel (CP) CIS imaging structure with a single-slope analog-to-digital convertor (SS ADC), it discovered an additional time slot available to extract information of an additional image during a normal imaging operation of two adjacent columns. While obtaining a normal image in this study, the prototype CIS with the proposed edge-detection counter effectively utilizes the spare time for extracting an additional column edge image without an image signal processor (ISP) and any computational latency. In addition, by applying a proposed variable edge thresholding function, the proposed CIS can adopt an optimum edge threshold value according to its imaging condition, alleviating an inherent limitation of a column edge image. This prototype CIS was fabricated using a 0.18-mu m 1-poly 6-metal (1P6M) CMOS process with an effective pixel resolution of 320 (H) x 320 (V). The prototype consumes 17.72-mW power with a frame rate of 240 frames/s. The prototype CIS demonstrated a figure of merit of 721 pW/frame pixel.
引用
收藏
页码:9254 / 9261
页数:8
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