Improved Control for Three-Phase Rectifiers with Constant Power Loads

被引:1
|
作者
Degioanni, Franco [1 ]
Zurbriggent, Ignacio Galiano [2 ]
Ordonez, Martin [1 ]
机构
[1] Univ British Columbia, Vancouver, BC, Canada
[2] Univ Calgary, Calgary, AB, Canada
关键词
Digital Control; Three-Phase; Rectifier; PWM; Converters; Control; Constant Power Load; CPL; COMPENSATION;
D O I
10.1109/APEC43580.2023.10131411
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Three-Phase Pulse Width Modulated (PWM) rectifiers are used in a different number of applications such as battery chargers, renewable energy systems, and motor drives, among others. Most of these systems adopt a multi-stage architecture and the rectifier is used as the first stage to transfer the power from the AC source to the DC bus which is connected to one or more power converters to transfer the power to different types of loads. These load converters usually regulate their output currents and voltages, and consequently, they present constant power load (CPL) behavior from the rectifier's point of view. The presence of CPLs in the DC-bus provides additional constraints for the control design deteriorating the stability and dynamic performance of the system. Although conventional linear control approaches are able to regulate the DC-bus around the design operating point, they are ineffective when large CPL transients are applied, obtaining large settling times and voltage/current overshoot that can lead to system failure due to the collapse of the DC-bus. This work introduces an effective geometric-based controller that improves the dynamic performance of three-phase rectifiers loaded with CPLs in the DC-bus. The design and operation of the proposed controller are based on the normalized decoupled model of the rectifier in the synchronous reference frame (SRF). The derived model provides a simple graphical representation of the operating point dynamics in the state plane. In this way, the insights provided by the state plane analysis can be applied to define and derive a control law that achieves improved dynamic performance under CPL transients. The implementation of the proposed controller is validated by hardware-in-the-loop(HIL) experimental results and compared with the conventional linear approach.
引用
收藏
页码:2775 / 2779
页数:5
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