High-Speed SiGe BiCMOS Circuits for Optical Communication

被引：2

作者：

Torfs, Guy ^{[1
]}

Moeneclaey, Bart ^{[1
]}

Lambrecht, Joris ^{[1
]}

Bruynsteen, Cedric ^{[1
]}

Declerq, Jakob ^{[1
]}

Niu, Shengpu ^{[1
]}

Singh, Nishant ^{[1
]}

Verbeke, Marijn ^{[1
]}

Yin, Xin ^{[1
]}

Ossieur, Peter ^{[1
]}

Bauwelinck, Johan ^{[1
]}

机构：

[1] Univ Ghent, Dept Informat Technol, IDLab, imec, Ghent, Belgium

来源：

2023 IEEE BICMOS AND COMPOUND SEMICONDUCTOR INTEGRATED CIRCUITS AND TECHNOLOGY SYMPOSIUM, BCICTS | 2023年

基金：

欧盟地平线“2020”;

关键词：

optical transceivers; driver; equalizer; transimpedance amplifier; multiplexer;

D O I：

10.1109/BCICTS54660.2023.10311016

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents an overview of SiGe BiCMOS circuits for next-generation optical communication links targeting 100 GBd PAM4 modulation per wavelength to support 4-lane 800Gb and 8-lane 1.6Tb Ethernet. Signal generation at these rates is challenging. For this, an analog multiplexer making use of return-to-zero (RZ) modulation is presented. The explicit RZ generation enables equalization of the interleaved signal. Higher equalization orders are obtained with a 120 GBd PAM4 4-to-1 multiplexer with a mixed-signal 7-tap feedforward equalizer. The equalizer consists of a combination of digital delay cells and analog delay cells enabling a compact and power efficient solution. Quad-channel modulator drivers and receivers finish the required highspeed circuits. Based on traveling-wave architectures high gain-bandwidth products are realized.

引用

页码：153 / 158

页数：6

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