Materials to System Co-optimization (MSCOTM) for SRAM and its application towards Gate-All-Around Technology

被引：0

作者：

Vyas, Pratik B. ^{[1
]}

Pal, Ashish ^{[1
]}

Costrini, Gregory ^{[1
]}

Asenov, Plamen ^{[2
]}

Mhedhbi, Sarra ^{[1
]}

Zhao, Charisse ^{[1
]}

Moroz, Victor ^{[2
]}

Colombeau, Benjamin ^{[1
]}

Haran, Bala ^{[1
]}

Bazizi, El Mehdi ^{[1
]}

Ayyagari-Sangamalli, Buvna ^{[1
]}

机构：

[1] Appl Mat Inc, Santa Clara, CA 95054 USA

[2] Synopsys Inc, Mountain View, CA USA

来源：

2023 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES, SISPAD | 2023年

关键词：

SRAM; GAA; FinFET; DTCO; SNM; Write Margin; circuit design; device modeling;

D O I：

10.23919/SISPAD57422.2023.10319497

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, we deploy our SRAM MSCO framework to evaluate the GAA SRAM performance and explore different performance optimization strategies. Our modeling indicates that GAA SRAM can have better stability, writability and read-current compared to FinFET SRAM, primarily due to better electrostatics and drive-strength ratio between nMOS and pMOS. Furthermore, we show that design optimizations through varying nanosheet count, nanosheet width and RMG workfunction allows GAA SRAM to be tailored for different applications.

引用

页码：53 / 56

页数：4

共 18 条

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