Electrical Performance Determination and Stress Reliability Estimation of ALD-Derived Er2O3/InP Heterointerface

被引:0
|
作者
Qiao, Lesheng [1 ]
He, Gang [1 ]
Jiang, Shanshan [2 ]
Liu, Yanmei [1 ]
Lu, Jinyu [1 ]
Wu, Qiuju [3 ]
Fang, Zebo [3 ]
机构
[1] Anhui Univ, Sch Mat Sci & Engn, Hefei 230601, Peoples R China
[2] Anhui Univ, Sch Integrat Circuits, Hefei 230601, Peoples R China
[3] Shaoxing Univ, Sch Math Informat, Shaoxing 312000, Peoples R China
基金
中国国家自然科学基金;
关键词
Atomic-layer-deposition (ALD); Er2O3 gate dielectric; InP-based MOS capacitor; interface state density; trapped charge; BIAS-TEMPERATURE INSTABILITIES; MOS CAPACITORS; INTERFACE OPTIMIZATION; LAYER; PASSIVATION; INP; AL2O3; OXIDE; IRRADIATION; MODULATION;
D O I
10.1109/TED.2023.3326135
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
High-quality gate dielectric layers and high-grade interfaces between high- k films and substrates are essential to achieve favorable performance and electrical stability of metal-oxide-semiconductor field effect transistors (MOSFETs). The carrier trapping behavior of the oxide layer and interface defects under different external stresses has raised concerns about the instability of the performance of II I-V compound semiconductor devices. Herein, we explore the atomic-layer-deposition (ALD) growth method of erbium oxide (Er2O3) and the fabrication of InP-based MOS capacitors. Moreover, the trapping effects of oxide layer traps and interface traps were separated using the mid-band voltage method, and the stability evolution of the ALD-derived Er2O3/InP MOS capacitors under irradiation, voltage stress, and temperature was investigated comparatively. In this work, favorable interface chemical states and optimized interface roughness in the Er2O3/InP structure achieved a low-leakage current density of 2.0 x 10(-5) A/cm(2) and an interface density of states of 3.97 x 10(12) eV(-1) & sdot; cm(-2). The stability tests results show that irradiation mainly applied at the interface leads to the generation of defects, the capture of electrons increases, and the device performance varies; under the voltage stress primarily the electrons capture by defects inside the oxide layer shifts the flat-band voltage; high-temperature damages both the gate oxide layer and interface, and the defects primarily capture positive charges, which affects the stability considerably.
引用
收藏
页码:6125 / 6131
页数:7
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