Measurement Approach to Evaluation of Ultra-Low-Voltage Amplifier ASICs

被引：0

作者：

Ravasz, Richard ^{[1
]}

Potocny, Miroslav ^{[1
]}

Arbet, Daniel ^{[1
]}

Kovac, Martin ^{[1
]}

Maljar, David ^{[1
]}

Nagy, Lukas ^{[1
]}

Stopjakova, Viera ^{[1
]}

机构：

[1] Slovak Tech Univ, Fac Elect Engn & Informat Technol, Inst Elect & Photon, Dept IC Design & Test, Ilkovicova 3, Bratislava 81219, Slovakia

来源：

MEASUREMENT SCIENCE REVIEW | 2024年 / 24卷 / 01期

基金：

欧盟地平线“2020”;

关键词：

Integrated circuit testing; measurement board; input offset voltage; Common-Mode Rejection Ratio (CMRR); Power Supply Rejection Ratio (PSRR); Fully Differential Difference Amplifier (FDDA);

D O I：

10.2478/msr-2024-0002

中图分类号：

TH7 [仪器、仪表];

学科分类号：

0804 ; 080401 ; 081102 ;

摘要：

This article presents measurement circuits and a test board developed for the experimental evaluation of prototype chip samples of the Fully Differential Difference Amplifier (FDDA). The Device Under Test (DUT) is an ultra low-voltage, high performance integrated FDDA designed and fabricated in 130nm CMOS technology. The power supply voltage of the FDDA is 400mV. The measurement circuits were implemented on the test board with the fabricated FDDA chip to evaluate its main parameters and properties. In this work, we focus on evaluation of the following parameters: the input offset voltage, the common-mode rejection ratio, and the power supply rejection ratio. The test board was developed and verified. The test board error was measured to be 38.73mV. The offset voltage of the FDDA was -0.66mV. The measured FDDA gain and gain bandwidth were 48dB and 550kHz, respectively. In addition to the measurement board, a graphical user interface was also developed to simplify the control of the device under test during measurements.

引用

页码：9 / 16

页数：8

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