Design of high-speed data transfer turbo code for body channel communication transceivers

被引:1
|
作者
Vijayalakshmi, Sankaran [1 ]
Paramasivam, Alagumariappan [2 ]
Sakthivel, Sankaran [3 ]
Kudiyarasan, Swamynathan [4 ]
Sankaran, Esakky [5 ]
Nagarajan, Velmurugan [6 ]
机构
[1] Vel Tech Rangarajan Dr Sagunthala R&D Inst Sci & T, Dept Elect & Commun Engn, Chennai, India
[2] Vel Tech Rangarajan Dr Sagunthala R&D Inst Sci & T, Dept Biomed Engn, Chennai, India
[3] SRM Inst Sci & Technol, Dept Biomed Engn, Ramapuram Campus, Chennai, India
[4] Bharatiya Nabhikiya Vidyut Nigam Ltd, Dept Elect Engn, Dept Atom Energy, Chennai, India
[5] GRT Inst Engn & Technol, Dept Elect & Elect Engn, Tiruttani, India
[6] Adhiparasakthi Engn Coll, Dept Elect & Commun Engn, Melmaruvathur, India
关键词
body channel communication; encoding scheme; error correction; modulation; transceivers; DECODER; OFDM; PERFORMANCE;
D O I
10.1002/dac.5447
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this work, a digital differential transmitter based on low-power wireless compensation transceiver for body channel communication (BCC) is proposed. Further, the proposed transceiver is composed of Touch Status Detection Unit (TSDU), Wireless Status Compensation Unit (WSCU), and a reconfigurable preamplifier. Initially, the human body channel environment for wireless communication is investigated based on properties from 1 to 100 MHz. Further, the turbo code-based encoding scheme is used to encode the data before transferring the data on the transmitter side. Also, the proposed error-correcting parallel turbo decoder using a modified step-by-step algorithm is presented. The turbo code-based decoding scheme is used to recover the error-free transmitted data at the receiver side. Results demonstrate that the proposed BCC transceiver is designed using 90 nm CMOS technology and it is observed that the proposed BCC transceiver has utilized an area of 600mm(2). Also, the maximum data rate achieved by a proposed BCC transceiver was 100 Mbps, and the overall transceiver power consumption is 0.42 mW, and energy for communication is 0.02 nj/b.
引用
收藏
页数:11
相关论文
共 50 条
  • [41] Design of a dual channel high-speed wideband synchronous data acquisition system
    Liu Junzhi
    PROCEEDINGS OF 2015 IEEE 12TH INTERNATIONAL CONFERENCE ON ELECTRONIC MEASUREMENT & INSTRUMENTS (ICEMI), VOL. 1, 2015, : 304 - 308
  • [42] High-speed electronics for silicon photonics transceivers
    Bauwelinck, Johan
    Ossieur, Peter
    Roelkens, Gunther
    Vanhoecke, Michael
    Lambrecht, Joris
    Ramon, Hannes
    Breyne, Laurens
    Bruynsteen, Cedric
    Bogaert, Laurens
    Van Kerrebrouck, Joris
    Verplaetse, Michiel
    Torfs, Guy
    Moeneclaey, Bart
    Van Campenhout, Joris
    Yin, Xin
    INTEGRATED PHOTONICS PLATFORMS: FUNDAMENTAL RESEARCH, MANUFACTURING AND APPLICATIONS, 2020, 11364
  • [43] High-speed integrated transceivers for optical wireless
    O'Brien, DC
    Faulkner, GE
    Jim, K
    Zyambo, EB
    Edwards, DJ
    Whitehead, M
    Stavrinou, P
    Parry, G
    Bellon, J
    Sibley, MJ
    Lalithambika, VA
    Joyner, VM
    Samsudin, RJ
    Holburn, DM
    Mears, RJ
    IEEE COMMUNICATIONS MAGAZINE, 2003, 41 (03) : 58 - 62
  • [44] Design and FPGA Implementation of High-Speed, Fixed-Latency Serial Transceivers
    Liu, Xue
    Deng, Qing-Xu
    Wang, Ze-Ke
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2014, 61 (01) : 561 - 567
  • [45] The Research of the Turbo Coding Technology in the High-speed Underwater Communication with OFDM Mode
    Lan, Wei
    Fang, Bin
    Jin, Shi-Sheng
    Cheng, Wei Wei
    PIERS 2011 SUZHOU: PROGRESS IN ELECTROMAGNETICS RESEARCH SYMPOSIUM, 2011, : 1211 - 1214
  • [46] High-speed and low-power design of parallel turbo decoder
    He, ZY
    Roy, S
    Fortier, P
    2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS, 2005, : 6018 - 6021
  • [47] High-Speed Data Transfer Using PLC
    Misurec, Jiri
    Orgon, Milos
    2018 25TH INTERNATIONAL CONFERENCE ON SYSTEMS, SIGNALS AND IMAGE PROCESSING (IWSSIP), 2018,
  • [48] BUFFERING FOR HIGH-SPEED DATA TRANSFER.
    Wade, F.L.
    IBM Technical Disclosure Bulletin, 1972, 15 (05): : 1426 - 1429
  • [49] Design and architecture of low-latency high-speed turbo decoders
    Jung, JW
    Lee, IK
    Choi, DG
    Jeong, JH
    Kim, KM
    Choi, EA
    Oh, DG
    ETRI JOURNAL, 2005, 27 (05) : 525 - 532
  • [50] High-Speed and Low-Complexity Decoding Architecture for Double Binary Turbo Code
    Kwon, Kon-Woo
    Baek, Kwang-Hyun
    Lee, Jeong Woo
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2011, E94A (11) : 2458 - 2461