Kernel Shape Control for Row-Efficient Convolution on Processing-In-Memory Arrays

被引:2
|
作者
Rhe, Johnny [1 ]
Jeon, Kang Eun [1 ]
Lee, Joo Chan [2 ]
Jeong, Seongmoon [2 ]
Ko, Jong Hwan [3 ]
机构
[1] Sungkyunkwan Univ, Dept Elect & Comp Engn, Suwon, South Korea
[2] Sungkyunkwan Univ, Dept Artificial Intelligence, Suwon, South Korea
[3] Sungkyunkwan Univ, Coll Informat & Commun Engn, Suwon, South Korea
基金
新加坡国家研究基金会;
关键词
processing-in-memory; shift and duplicate (SDK) weight mapping; weight pruning; neural compression; ARCHITECTURE; PRECISION;
D O I
10.1109/ICCAD57390.2023.10323749
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Processing-in-memory (PIM) architectures have been highlighted as one of the viable solutions for faster and more power-efficient convolutional neural networks (CNNs) inference. Recently, shift and duplicate kernel (SDK) convolutional weight mapping scheme was proposed, achieving up to 50% throughput improvement over the prior arts. However, the traditional pattern-based pruning methods, which were adopted for row-skipping and computing cycle reduction, are not optimal for the latest SDK mapping due to structural irregularity caused by the shifted and duplicated kernels. To address this issue, we propose a method called kernel shape control (KERNTROL) that aims to promote structural regularity for achieving a high row-skipping ratio and model accuracy. Instead of pruning certain weight elements permanently, KERNTROL controls the kernel shapes through the omission of certain weights based on their mapped columns. In comparison to the latest pattern-based pruning approaches, KERNTROL achieves up to 36.4% improvement in the compression rate, and 38.6% in array utilization with maintaining the original model accuracy.
引用
收藏
页数:9
相关论文
共 50 条
  • [31] An Energy-efficient Processing-in-memory Architecture for Long Short Term Memory in Spin Orbit Torque MRAM
    Kim, Kyeonghan
    Shin, Hyein
    Sim, Jaehyeong
    Kang, Myeonggu
    Kim, Lee-Sup
    2019 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD), 2019,
  • [32] Identification of a convolution kernel in a control problem for the heat equation with a boundary memory term
    Cecilia Cavaterra
    Davide Guidetti
    Annali di Matematica Pura ed Applicata, 2014, 193 : 779 - 816
  • [33] Identification of a convolution kernel in a control problem for the heat equation with a boundary memory term
    Cavaterra, Cecilia
    Guidetti, Davide
    ANNALI DI MATEMATICA PURA ED APPLICATA, 2014, 193 (03) : 779 - 816
  • [34] An Efficient Test Architecture Using Hybrid Built-In Self-Test for Processing-in-Memory
    Lee, Hayoung
    Lee, Juyong
    Kang, Sungho
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2024,
  • [35] A Flexible Yet Efficient DNN Pruning Approach for Crossbar-Based Processing-in-Memory Architectures
    Zheng, Long
    Liu, Haifeng
    Huang, Yu
    Chen, Dan
    Liu, Chaoqiang
    He, Haiheng
    Liao, Xiaofei
    Jin, Hai
    Xue, Jingling
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 41 (11) : 3745 - 3756
  • [36] Efficient Error-Correcting-Code Mechanism for High-Throughput Memristive Processing-in-Memory
    Leitersdorf, Orian
    Perach, Ben
    Ronen, Ronny
    Kvatinsky, Shahar
    2021 58TH ACM/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2021, : 199 - 204
  • [37] RIME: A Scalable and Energy-Efficient Processing-In-Memory Architecture for Floating-Point Operations
    Lu, Zhaojun
    Arafin, Md Tanvir
    Qu, Gang
    2021 26TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2021, : 120 - 125
  • [38] Lattice: An ADC/DAC-less ReRAM-based Processing-In-Memory Architecture for Accelerating Deep Convolution Neural Networks
    Zheng, Qilin
    Wang, Zongwei
    Feng, Zishun
    Yan, Bonan
    Cai, Yimao
    Huang, Ru
    Chen, Yiran
    Yang, Chia-Lin
    Li, Hai
    PROCEEDINGS OF THE 2020 57TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), 2020,
  • [39] PAIRS: Pruning-AIded Row-Skipping for SDK-Based Convolutional Weight Mapping in Processing-In-Memory Architectures
    Rhe, Johnny
    Jeon, Kang Eun
    Ko, Jong Hwan
    2023 IEEE/ACM INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN, ISLPED, 2023,
  • [40] VW-SDK: Efficient Convolutional Weight Mapping Using Variable Windows for Processing-In-Memory Architectures
    Rhe, Johnny
    Moon, Sungmin
    Ko, Jong Hwan
    PROCEEDINGS OF THE 2022 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2022), 2022, : 214 - 219