Optimizing a Field-Programmable Gate Array Object Detection System Considering Processing System and Programmable Logic Load Balance

被引：0

作者：

Watanabe, Yusuke ^{[1
,2
]}

Tamukoh, Hakaru ^{[3
]}

机构：

[1] CRAFT WORK Co Ltd, 5F OS Bldg,3-5-15 Shibasaki Cho, Tachikawa, Tokyo 1900023, Japan

[2] Kyushu Inst Technol, Grad Sch Life Sci & Syst Engn, 2-4 Hibikino,Wakamatsu Ku, Kitakyushu, Fukuoka 8080196, Japan

[3] Kyushu Inst Technol, Grad Sch Life Sci & Syst Engn, 2-4 Hibikino,Wakamatsu Ku, Kitakyushu, Fukuoka 8080196, Japan

来源：

JOURNAL OF ROBOTICS NETWORKING AND ARTIFICIAL LIFE | 2023年 / 10卷 / 02期

关键词：

FPGA IMPLEMENTATION; NETWORK;

D O I：

暂无

中图分类号：

TP24 [机器人技术];

学科分类号：

080202 ; 1405 ;

摘要：

A field-programmable gate array (FPGA) device with a Zynq architecture integrates a processing system (PS) and programmable logic (PL) into a single chip. Although the PL performance is typically considered, the PS load cannot be completely ignored. In this study, using an FPGA board with a Zynq architecture, the conditions under which an object detection system performs the best, while considering the PS and PL load balance, are explored. (c) 2022 The Author. Published by Sugisaka Masanori at ALife Robotics Corporation Ltd.

引用

页码：105 / 114

页数：10

共 50 条

[21] Implementation of Petri nets using a field-programmable gate array
Yang, SK
Liu, TS
QUALITY AND RELIABILITY ENGINEERING INTERNATIONAL, 2000, 16 (02) : 99 - 116
[22] Field-programmable system-on-a-chip
Ismail, M
Tan, N
IEEE CIRCUITS & DEVICES, 2000, 16 (02): : 9 - 10
[23] Field-programmable gate array acceleration of the Tersoff potential in LAMMPS
Deng, Quan
Liu, Qiang
ENGINEERING REPORTS, 2025, 7 (01)
[24] FIELD-PROGRAMMABLE GATE ARRAY WITH NON-VOLATILE CONFIGURATION
HAINES, A
MICROPROCESSORS AND MICROSYSTEMS, 1989, 13 (05) : 305 - 312
[25] A Floating-Gate-Based Field-Programmable Analog Array
Basu, Arindam
Brink, Stephen
Schlottmann, Craig
Ramakrishnan, Shubha
Petre, Csaba
Koziol, Scott
Baskaya, Faik
Twigg, Christopher M.
Hasler, Paul
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2010, 45 (09) : 1781 - 1794
[26] A SUBLITHOGRAPHIC ANTIFUSE STRUCTURE FOR FIELD-PROGRAMMABLE GATE ARRAY APPLICATIONS
CHEN, KL
LIU, DKY
MISIUM, G
GOSNEY, WM
WANG, SJ
CAMP, J
TIGELAAR, H
IEEE ELECTRON DEVICE LETTERS, 1992, 13 (01) : 53 - 55
[27] Multiband Broadband Modulator Implementation on Field-Programmable Gate Array
Castro, Cristhian
Gordon, Carlos
Encalada, Patricio
Cumbajin, Myriam
APPLIED TECHNOLOGIES (ICAT 2019), PT III, 2020, 1195 : 318 - 330
[28] Computational ghost imaging using a field-programmable gate array
Hoshi, Ikuo
Shimobaba, Tomoyoshi
Kakue, Takashi
Ito, Tomoyoshi
OSA CONTINUUM, 2019, 2 (04) : 1097 - 1105
[29] A fine-grained programmable logic module with small amount of configuration data for dynamically reconfigurable field-programmable gate array
Miyamoto, N
Karnan, L
Kotani, K
Ohmi, T
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 2003, 42 (4B): : 2167 - 2170
[30] Power efficient optimum design of the Reversible Plessey Logic Block of a field-programmable gate array
Tara, Nazma
Babu, Hafiz Md. Hasan
Jamal, Lafifa
SUSTAINABLE COMPUTING-INFORMATICS & SYSTEMS, 2017, 16 : 76 - 92

← 1 2 3 4 5 →