Optimizing a Field-Programmable Gate Array Object Detection System Considering Processing System and Programmable Logic Load Balance

被引：0

作者：

Watanabe, Yusuke ^{[1
,2
]}

Tamukoh, Hakaru ^{[3
]}

机构：

[1] CRAFT WORK Co Ltd, 5F OS Bldg,3-5-15 Shibasaki Cho, Tachikawa, Tokyo 1900023, Japan

[2] Kyushu Inst Technol, Grad Sch Life Sci & Syst Engn, 2-4 Hibikino,Wakamatsu Ku, Kitakyushu, Fukuoka 8080196, Japan

[3] Kyushu Inst Technol, Grad Sch Life Sci & Syst Engn, 2-4 Hibikino,Wakamatsu Ku, Kitakyushu, Fukuoka 8080196, Japan

来源：

JOURNAL OF ROBOTICS NETWORKING AND ARTIFICIAL LIFE | 2023年 / 10卷 / 02期

关键词：

FPGA IMPLEMENTATION; NETWORK;

D O I：

暂无

中图分类号：

TP24 [机器人技术];

学科分类号：

080202 ; 1405 ;

摘要：

A field-programmable gate array (FPGA) device with a Zynq architecture integrates a processing system (PS) and programmable logic (PL) into a single chip. Although the PL performance is typically considered, the PS load cannot be completely ignored. In this study, using an FPGA board with a Zynq architecture, the conditions under which an object detection system performs the best, while considering the PS and PL load balance, are explored. (c) 2022 The Author. Published by Sugisaka Masanori at ALife Robotics Corporation Ltd.

引用

页码：105 / 114

页数：10

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