High-Throughput and Multiplierless Hardware Design for the AV1 Fractional Motion Estimation

被引：0
|
作者：
Domanski, Robson [1 ]
Kolodziejski, William [1 ]
Penny, Wagner [1 ]
Porto, Marcelo [1 ]
Zatt, Bruno [1 ]
Agostini, Luciano [1 ]
机构：
[1] Fed Univ Pelotas UFPel, GACI, ViTech, Pelotas, RS, Brazil
来源：
2023 IEEE 14TH LATIN AMERICA SYMPOSIUM ON CIRCUITS AND SYSTEMS, LASCAS | 2023年
关键词：
AV1; Fractional Motion Estimation; Hardware Design; Video Coding;
D O I：
10.1109/LASCAS56464.2023.10108378
中图分类号：
TP39 [计算机的应用];
学科分类号：
081203 ; 0835 ;
摘要：
AV1 video encoder is one of the newest codecs in the market and it was developed by the Alliance for Open Media team. This work is presented a high throughput hardware design for the AV1 Fractional Motion Estimation (FME). This designed architecture was synthesized for TSMC 40 nm standard cell technology and can process 4K UHD videos at 30 fps with a power dissipation of 246.9 mW and with an area of 389.6 Kgates. So far, the authors have not found any other published work regarding dedicated hardware designs for the complete AV1 FME.
引用
收藏
页码：72 / 75
页数：4
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