Horizontal InAs nanowire transistors grown on patterned silicon-on-insulator substratea

被引：0

作者：

张望 ^{[1
,2
]}

韩伟华 ^{[1
,2
]}

赵晓松 ^{[1
,2
]}

吕奇峰 ^{[1
,2
]}

季祥海 ^{[3
]}

杨涛 ^{[3
]}

杨富华 ^{[1
,2
,4
]}

机构：

[1] Engineering Research Center for Semiconductor Integrated Technology, Beijing Engineering Center of Semiconductor Micro-Nano Integrated Technology,Institute of Semiconductors, Chinese Academy of Sciences

[2] School of Electronic, Electrical, and Communication Engineering, University of Chinese Academy of Sciences

[3] Key Laboratory of Semiconductor Materials Science, Beijing Key Laboratory of Low Dimensional Semiconductor Materials and Devices,Institute of Semiconductors, Chinese Academy of Sciences

[4] State Key Laboratory for Superlattices and Microstructures, Institute of Semiconductors, Chinese Academy of Sciences

来源：

Chinese Physics B | 2017年 / 26卷 / 08期

基金：

中国国家自然科学基金;

关键词：

InAs nanowires; Si substrate; interdigital structure; MOSFET;

D O I：

暂无

中图分类号：

TN32 [半导体三极管（晶体管）];

学科分类号：

0805 ; 080501 ; 080502 ; 080903 ;

摘要：

High-density horizontal InAs nanowire transistors are fabricated on the interdigital silicon-on-insulator substrate.Hexagonal InAs nanowires are uniformly grown between face-to-face（111） vertical sidewalls of neighboring Si fingers by metal–organic chemical vapor deposition. The density of InAs nanowires is high up to 32 per group of silicon fingers,namely an average of 4 nanowires per micrometer. The electrical characteristics with a higher on/off current ratio of 2×10;are obtained at room temperature. The silicon-based horizontal InAs nanowire transistors are very promising for future high-performance circuits.

引用

页码：503 / 507

页数：5

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