Control Architecture for LLC Resonant Converters With High Input Disturbance Rejection Capability Using Output Diode Current

被引:0
|
作者
Maheshwari, Anuj [1 ]
Karakaya, Furkan [1 ]
Banerjee, Arijit [1 ]
Donnal, John S. [2 ]
机构
[1] Univ Illinois, Dept Elect & Comp Engn, Urbana, IL 61801 USA
[2] United States Naval Acad, Dept Weap & Syst Engn, Annapolis, MD 21402 USA
关键词
LLC resonant converter; second harmonic ripple reduction; single phase rectifier; small signal analysis; AC-DC CONVERTER; 2ND-HARMONIC CURRENT; CONTROL DESIGN; STRATEGY; SCHEMES;
D O I
10.1109/TPEL.2024.3475251
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The controller design for the LLC resonant dc-dc converter is challenging due to the large number of poles whose locations vary with operating conditions. A controller's ability to reject input disturbance is required to reduce the input filter size, increase power density, and improve reliability. This article presents a control architecture utilizing the output diode current measurement that reduces the control-to-output transfer function for an LLC resonant converter to first order and provides a high degree of input voltage disturbance rejection with a marginal increase in implementation complexity. The increased disturbance rejection allows the reduction of the bulky dc-link capacitance at the output of the PFC in electric vehicle battery charging application. A small-signal model for the proposed control variable is derived, and loop analysis using a Bode plot highlights the advantages of the proposed method. Simulation results verify the proposed architecture's high disturbance rejection capabilities. The proposed control architecture is evaluated using a 1-kW front-end power factor correction (PFC) rectifier followed by an LLC resonant converter with an intermediate dc-link voltage of 400 V. The proposed approach achieves a 4.5x reduction in the energy storage requirement in the intermediate dc-link compared to direct frequency control without sacrificing output voltage ripple and efficiency of the LLC stage and total harmonic distortion at the input of the PFC stage.
引用
收藏
页码:652 / 664
页数:13
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