WORD LINE SELECTION CIRCUIT FOR SCHOTTKY-COUPLED MEMORY CELL ARRAY.

被引:0
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作者
Dussault, R.D.
机构
来源
IBM technical disclosure bulletin | 1985年 / 27卷 / 08期
关键词
SEMICONDUCTOR DEVICES; SCHOTTKY BARRIER;
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摘要
A selection circuit is presented which offers a fast selection technique for a Schottky-coupled memory cell array, where the drain line and word line are pulled down for selection. The advantages of the circuit include the following: (1) a transient active pull down of the drain line to provide a fast selection mode, (2) an active pull up of the word line to provide a fast deselection mode, and (3) a well controlled fully selected drain line current which is important for the operation of the cells during a read or write mode.
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页码:4873 / 4874
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