Testability and test generation for majority voting fault-tolerant circuits

被引:0
|
作者
Stroud, Charles E. [1 ]
Barbour, Ahmed E. [1 ]
机构
[1] AT&T Bell Lab, Naperville, United States
关键词
18;
D O I
暂无
中图分类号
学科分类号
摘要
引用
收藏
页码:201 / 214
相关论文
共 50 条
  • [41] Systematic Methods to Evaluate Fault-Tolerant Behavior of Nanoscale Circuits
    Rao, Huifei
    Zhao, H. Vicky
    Chen, Jie
    ADVANCED SCIENCE LETTERS, 2011, 4 (11-12) : 3496 - 3507
  • [42] Bilateral Testing of Nano-scale Fault-Tolerant Circuits
    Lei Fang
    Michael S. Hsiao
    Journal of Electronic Testing, 2008, 24 : 285 - 296
  • [43] Time-redundancy Transformations for Adaptive Fault-Tolerant Circuits
    Burlyaev, Dmitry
    Fradet, Pascal
    Girault, Alain
    2015 NASA/ESA CONFERENCE ON ADAPTIVE HARDWARE AND SYSTEMS (AHS), 2015,
  • [44] Design of Single-Bit Fault-Tolerant Reversible Circuits
    Gaur H.M.
    Singh A.K.
    Mohan A.
    Fujita M.
    Pradhan D.K.
    IEEE Design and Test, 2021, 38 (02): : 89 - 96
  • [45] A systematic approach towards fault-tolerant design of QCA circuits
    Kumar, Dharmendra
    Mitra, Debasis
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2019, 98 (03) : 501 - 515
  • [46] Synthesis and Fundamental Energy Analysis of Fault-Tolerant CMOS Circuits
    Ercan, Ilke
    Susam, Omercan
    Altun, Mustafa
    Cilasun, M. Husrev
    2017 14TH INTERNATIONAL CONFERENCE ON SYNTHESIS, MODELING, ANALYSIS AND SIMULATION METHODS AND APPLICATIONS TO CIRCUIT DESIGN (SMACD), 2017,
  • [47] T-depth Optimization for Fault-Tolerant Quantum Circuits
    Niemann, Philipp
    Gupta, Anshu
    Drechsler, Rolf
    2019 IEEE 49TH INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC (ISMVL), 2019, : 108 - 113
  • [48] Test generation for VLSI circuits from testability profile distribution
    Farhat, H
    COMPUTER APPLICATIONS IN INDUSTRY AND ENGINEERING, 2001, : 201 - 204
  • [49] Analysis of Binary Voting Algorithms for use in Fault-Tolerant and Secure Computing
    Kwiat, Kevin
    Taylor, Alan
    Zwicker, William
    Hill, Daniel
    Wetzonis, Sean
    Ren, Shangping
    ICCES'2010: THE 2010 INTERNATIONAL CONFERENCE ON COMPUTER ENGINEERING & SYSTEMS, 2010, : 269 - 273
  • [50] Fast error-correcting circuits for fault-tolerant memory
    Ou, E
    Yang, W
    RECORDS OF THE 2004 IEEE INTERNATIONAL WORKSHOP ON MEMORY TECHNOLOGY, DESIGN AND TESTING, 2004, : 8 - 12