PARAMETER TOLERANCE DESIGN FOR ELECTRICAL CIRCUITS.

被引:1
|
作者
Ilumoka, A. [1 ]
Spence, R. [1 ]
机构
[1] Univ of Lagos, Nigeria, Univ of Lagos, Nigeria
关键词
D O I
暂无
中图分类号
学科分类号
摘要
18
引用
收藏
页码:87 / 94
相关论文
共 50 条
  • [21] Considerations for the Design of Integrated MIS Circuits.
    Roessler, F.
    Nachrichtentechnik Elektronik, 1975, 25 (03): : 94 - 99
  • [22] Purpose and constraint in design of retinal circuits.
    Sterling, P
    FASEB JOURNAL, 1998, 12 (05): : A628 - A628
  • [23] SYSTEM FOR THE AUTOMATED DESIGN OF COMPLEX INTEGRATED CIRCUITS.
    Heath, A.E.
    Lydick, Richard
    RCA Engineer, 1980, 26 (02): : 42 - 45
  • [24] DESIGN OF MICROPOWER CMOS QUATERNARY MEMORY CIRCUITS.
    Zukeran, Chotei
    Afuso, Chushin
    Kameyama, Michitaka
    Higuchi, Tatsuo
    Systems and Computers in Japan, 1987, 18 (11) : 61 - 69
  • [25] On an Interactive Optimization Method for the Design of Integrated Circuits.
    Leibner, Peter
    AEU. Archiv fur Elektronik und Ubertragungstechnik, 1986, 40 (01): : 1 - 9
  • [26] DESIGN REAL-WORLD STRIPLINE CIRCUITS.
    Gupta, K.C.
    Chadha, Rakesh
    1978, 17 (12): : 70 - 71
  • [27] SIMPLIFYING THE DESIGN OF HIGH SPEED ANALOGUE CIRCUITS.
    Zucker, Robert
    Wong, Thomas
    New Electronics, 1987, 20 (11): : 30 - 31
  • [28] NEW APPROACH TO THE TOPOLOGICAL DESIGN OF HYBRID CIRCUITS.
    Ulbrich, Walter
    van der Leeden, Rudolf
    Electrocomponent Science and Technology, 1979, 7 (1-3): : 181 - 186
  • [29] Interactive System for the Functional Design of Electronic Circuits.
    Theeuwen, J.F.M.
    Jess, J.A.G.
    EUT Report, Eindhoven University of Technology, Faculty of Electrical Engineering, 1980,
  • [30] EASILY TESTABLE DESIGN OF LARGE DIGITAL CIRCUITS.
    Funatsu, Shigehiro
    Wakatsuki, Nobuo
    Yamada, Akihiko
    NEC Research and Development, 1979, (54): : 49 - 55