Optimizing the CORDIC algorithm for processors with pipeline architectures

被引：0
|
作者：
机构：
来源：
| 1600年 / Publ by Elsevier Science Publishers B.V., Amsterdam, Neth卷
关键词：
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
收藏
相关论文
共 50 条
  • [31] Singular value decomposition using an array of CORDIC processors
    Milford, David
    Sandell, Magnus
    SIGNAL PROCESSING, 2014, 102 : 163 - 170
  • [32] Some possible applications of CORDIC processors in computer graphics
    Kocsis, F.
    Boehme, J.F.
    Proceedings of the European Computer Graphics Conference and Exhibition - Eurographics, 1990,
  • [33] Pipelined CORDIC processors for generating Gaussian random numbers
    Padala, SK
    Prabhu, KMM
    SIGNAL PROCESSING, 1999, 72 (03) : 177 - 181
  • [34] Digital predistorter with pipelined architecture using CORDIC processors
    Department of Mobile Systems Engineering, Sungkyunkwan University, Suwon, Gyeonggi-do 440-746, Korea, Republic of
    不详
    不详
    World Acad. Sci. Eng. Technol., (900-903):
  • [35] 50 years of CORDIC: Algorithms, architectures, and applications
    Meher, Pramod K.
    Valls, Javier
    Juang, Tso-Bing
    Sridharan, K.
    Maharatna, Koushik
    IEEE Transactions on Circuits and Systems I: Regular Papers, 2009, 56 (09) : 1893 - 1907
  • [36] A fast direction sequence generation method for cordic processors
    Nahm, S
    Sung, WY
    1997 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, VOLS I - V: VOL I: PLENARY, EXPERT SUMMARIES, SPECIAL, AUDIO, UNDERWATER ACOUSTICS, VLSI; VOL II: SPEECH PROCESSING; VOL III: SPEECH PROCESSING, DIGITAL SIGNAL PROCESSING; VOL IV: MULTIDIMENSIONAL SIGNAL PROCESSING, NEURAL NETWORKS - VOL V: STATISTICAL SIGNAL AND ARRAY PROCESSING, APPLICATIONS, 1997, : 635 - 638
  • [37] Para-CORDIC: Parallel CORDIC rotation algorithm
    Juang, TB
    Hsiao, SF
    Tsai, MY
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2004, 51 (08) : 1515 - 1524
  • [38] A Low-Latency Parallel Pipeline CORDIC
    Hong-Thu Nguyen
    Xuan-Thuan Nguyen
    Cong-Kha Pham
    IEICE TRANSACTIONS ON ELECTRONICS, 2017, E100C (04): : 391 - 398
  • [39] Multifunction architectures for RNS processors
    Paliouras, V
    Stouraitis, T
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1999, 46 (08): : 1041 - 1054
  • [40] Three Dimensional DCT Similar Butterfly Algorithm and its Pipeline Architectures
    Liu Yuanyuan
    Chen Hexin
    Zhao Yan
    Yang Chuxi
    2016 IEEE INFORMATION TECHNOLOGY, NETWORKING, ELECTRONIC AND AUTOMATION CONTROL CONFERENCE (ITNEC), 2016, : 506 - 510
12345