BIT ERROR RATE MONITOR FOR FOUR PHASE PSK SYSTEM.

被引:0
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作者
Takenaka, S.
Katoh, T.
Kurihara, H.
Fukui, M.
Nakamura, H.
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PHASE MODULATION - Phase Shift Keying;
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摘要
Two highly accurate pseudoerror detection methods for a bit error rate monitor are presented with practical circuit configurations. These are: an improved shifted decision phase threshold method and a newly devised noise addition method. Both methods are applied to the 4 phi CPSK/TDMA MODEM with a data rate of 43Mb ps at an if of 70 MHz. The accuracy of the estimated error rate was investigated under various channel conditions. Results showed that the estimation error is within 20% of the actual error rates from 10** minus **5 to 10** minus **2.
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