Decomposition of finite state machines for area, delay minimization

被引：0

作者：

Shelar, Rupesh S. ^{[1
]}

Desai, Madhav P. ^{[1
]}

Narayanan, H. ^{[1
]}

机构：

[1] Indian Inst of Technology, Mumbai, India

来源：

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors | 1999年

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D O I：

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摘要：

引用

页码：620 / 625

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