JAPANESE WORD PROCESSOR.

被引：0
|
作者：
Mori, Ken-ichi [1 ]
Kawada, Tsutomu [1 ]
Amano, Shin-ya [1 ]
机构：
[1] Toshiba Corp, Toshiba Research &, Development Cent, Kawasaki, Jpn, Toshiba Corp, Toshiba Research & Development Cent, Kawasaki, Jpn
来源：
Japan Annual Reviews in Electronics, Computers & Telecommunications | 1983年 / 7卷
关键词：
TYPEWRITERS; -; Japan;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
Japanese have a unique writing system: it employs four types of letters and symbols - Kanji (Chinese characters), two types of Kana, Hira-Kana and Kata-Kana, and alphanumerics. The number of Kanji characters used in newspapers and business exceeds more than three thousand. Thus, it has been impossible to develop a Japanese typewriter as compact and convenient as western typewriters. In order to overcome this problem, Kana-to-Kanji translation technology was developed to realize a new Japanese word processor. The development of the Japanese word processor was the turning point in promoting office automation in Japan. Japanese word processors are now widely used in offices, libraries, newspaper, and publishing companies.
引用
收藏
页码：119 / 128
相关论文
共 50 条
  • [41] MAINTENANCE SOFTWARE FOR THE ITT 3202 PROCESSOR.
    Penet, X.
    1978, 53 (02): : 142 - 147
  • [42] DESIGN AUTOMATION SYSTEM FOR VLSI PROCESSOR.
    Matsuura, Hiroyuki
    Hanazawa, Takashi
    Ono, Hiromichi
    Saito, Kiyoshi
    Denki Tsushin Kenkyusho Kenkyu Jitsuyoka Hokoku, 1984, 33 (07): : 1725 - 1735
  • [43] Industry perspective on marbling:packer/processor.
    Kaster, C. M. Schultz
    JOURNAL OF ANIMAL SCIENCE, 2007, 85 : 78 - 78
  • [44] FLOW OF INSTRUCTIONS THROUGH A PIPELINED PROCESSOR.
    Wood, W.F.
    ICL Technical Journal (International Computers Limited), 1980, 2 (01): : 59 - 78
  • [45] MULTISIGNAL CONTROL OF A SPIN ECHO PROCESSOR.
    Il'ina, E.A.
    Kovalevskii, M.M.
    Ustinov, V.B.
    Radiophysics and quantum electronics, 1985, 28 (07) : 640 - 643
  • [46] NEC MS SERIES AS OFFICE PROCESSOR.
    Kuriyama, Kozo
    Maruyama, Yoshikazu
    Kimizuka, Yoshio
    Yoshida, Shouki
    Kambara, Akifumi
    Sakurai, Takeo
    NEC Research and Development, 1985, : 185 - 193
  • [47] WAIT/HOLD STATE GENERATOR FOR A PROCESSOR.
    Dierks, M.M.
    Haydon, F.C.
    Kroeger, W.L.
    IBM technical disclosure bulletin, 1984, 26 (11): : 5788 - 5789
  • [48] FAST 15-BIT PROCESSOR.
    Bobkov, S.G.
    Kantserov, V.A.
    Instruments and experimental techniques New York, 1983, 26 (2 pt 1): : 300 - 305
  • [49] VLSI ARCHITECTURE FOR PIPELINE FFT PROCESSOR.
    Takahashi, Yukio
    Sekine, Satoshi
    Systems and Computers in Japan, 1987, 18 (12): : 18 - 28
  • [50] ABSTRACTION MECHANISMS SUPPORTED BY A MACRO PROCESSOR.
    Fukazawa, Yoshiaki
    1600, (06):
12345