SELF-ALIGNED QUARTER-TO-HALF-MICROMETER BURIED-GATE GaAs JUNCTION FET.

被引：0

作者：

Lo, Y.H. ^{[1
]}

Wang, Shyh ^{[1
]}

Miller, J. ^{[1
]}

Mars, D. ^{[1
]}

Wang, Shih-Yuan ^{[1
]}

机构：

[1] Univ of California, Berkeley, CA,, USA, Univ of California, Berkeley, CA, USA

来源：

Electron device letters | 1987年 / EDL-8卷 / 01期

关键词：

INTEGRATED CIRCUITS - SEMICONDUCTING GALLIUM ARSENIDE;

D O I：

暂无

中图分类号：

学科分类号：

摘要：

A reliable but simple self-aligned technology to fabricate very short buried-gate (0. 25-0. 5 mu m) GaAs JFET is presented. The device has a buried p-n junction gate to control the channel current, but, in particular, there is another Schottky contact connecting with the source to define the real channel length. The transconductance is 180 mS/mm and the gate leakage current density is only about one-hundredth of the conventional MESFET. Furthermore, there is no backgate effect regardless of how close two devices are neighbored. This technology and device structure are especially useful in GaAs integrated circuits.

引用

页码：36 / 38

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