NMOS-III PROCESS TECHNOLOGY.

被引:0
|
作者
Mikkelson, James M.
Fei, Fung-Sun
Malhotra, Arun K.
Seccombe, S.Dana
机构
来源
| 1983年 / 34期
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中图分类号
TN [电子技术、通信技术];
学科分类号
0809 ;
摘要
The major technological innovation required for the design and manufacture of the 32-bit HP 9000 Computer System was the development of NMOS III, a high-density, high-speed IC process. This eight-mask, n-channel, silicon-gate process uses optical lithography to print minimum features of 1. 5- mu m-wide lines and 1. 0- mu m spaces on all critical levels. Both enhancement and depletion devices are available. The devices are fabricated with 40-nm-thick gate oxides and shallow implanted sources and drains to reduce short-channel effects. Major departures from conventional MOS processes include external contacts to gates, drains, and sources, and two layers of refractory metallization for interconnecting devices.
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