2 Mbit/s - 140 Mbit/s SYNCHRONOUS MULTIPLEX SYSTEM.

被引：0
|
作者：
McCartney, P.J.
Hall, R.D.
机构：
来源：
British Telecom technology journal | 1987年 / 5卷 / 03期
关键词：
INTEGRATED CIRCUITS; VLSI; -; Applications; MULTIPLEXING; TIME DIVISION - SYSTEMS SCIENCE AND CYBERNETICS - Hierarchical Systems;
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学科分类号：
摘要：
This paper introduces the basic concepts of synchronous multiplexing, and describes some of its advantages and potential network applications. The requirements and development of a 2 Mbit/s synchronous multiplexing system are then discussed along with the chosen frame structure and circuit realization. The hardware configuration is described and the advantages gained over established plesiochronous multiplexing methods are detailed. The system employs VLSI to achieve low cost, low power consumption and high reliability.
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页码：25 / 31
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