SINGLE-CHIP PULSE PROCESSOR FOR NUCLEAR SPECTROSCOPY.

被引：0
|
作者：
Hilsenrath, F. [1 ]
Voss, H.D. [1 ]
Bakke, J.C. [1 ]
机构：
[1] Lockheed Palo Alto Research Lab,, Palo Alto, CA, USA, Lockheed Palo Alto Research Lab, Palo Alto, CA, USA
来源：
IEEE Transactions on Nuclear Science | 1984年 / NS-32卷 / 01期
关键词：
D O I：
暂无
中图分类号：
学科分类号：
摘要：
SIGNAL PROCESSING
引用
收藏
页码：145 / 149
相关论文
共 50 条
  • [31] Single-chip CMOS pulse generator for UWB systems
    Smaïni, L
    Tinella, C
    Hélal, D
    Stoecklin, C
    Chabert, L
    Devaucelle, O
    Cattenoz, W
    Belot, D
    ESSCIRC 2005: PROCEEDINGS OF THE 31ST EUROPEAN SOLID-STATE CIRCUITS CONFERENCE, 2005, : 271 - 274
  • [32] Single-chip CMOS pulse generator for UWB systems
    Smaini, Lydi
    Tinella, Carlo
    Helal, Didier
    Stoecklin, Claude
    Chabert, Laurent
    Devaucelle, Christophe
    Cattenoz, Regis
    Rinaldi, Nils
    Belot, Didier
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2006, 41 (07) : 1551 - 1561
  • [33] A scalable single-chip multi-processor architecture with on-chip RTOS kernel
    Theelen, BD
    Verschueren, AC
    Suárez, VVR
    Stevens, MPJ
    Nuñez, A
    JOURNAL OF SYSTEMS ARCHITECTURE, 2003, 49 (12-15) : 619 - 639
  • [34] Implementing a videoconferencing system based on a single-chip signal and image processor
    Read, CJ
    Golston, J
    Fuetterer, A
    Fazlic, E
    Miyazawa, H
    INTERNATIONAL JOURNAL OF IMAGING SYSTEMS AND TECHNOLOGY, 1998, 9 (06) : 434 - 441
  • [35] Time-Critical Computing on a Single-Chip Massively Parallel Processor
    de Dinechin, Benoit Dupont
    van Amstel, Duco
    Poulhies, Marc
    Lager, Guillaume
    2014 DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION (DATE), 2014,
  • [36] A HIGH-PERFORMANCE SINGLE-CHIP VLSI SIGNAL PROCESSOR ARCHITECTURE
    KANOPOULOS, N
    MARINOS, PN
    LECTURE NOTES IN COMPUTER SCIENCE, 1986, 227 : 166 - 179
  • [37] A SINGLE-CHIP CCD-SIGNAL-PROCESSOR FOR DIGITAL STILL CAMERAS
    WANG, JC
    SU, DS
    HWUNG, DJ
    LEE, JC
    IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, 1994, 40 (03) : 476 - 483
  • [38] The flexible processor - An approach for single-chip hardware emulation by dynamic reconfiguration
    Ohkawa, T
    Nozawa, T
    Fujibayashi, M
    Miyamoto, N
    Leo, K
    Kita, S
    Kotani, K
    Ohmi, T
    ASP-DAC 2004: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, 2004, : 557 - 558
  • [39] ARCHITECTURE FOR SINGLE-CHIP ASIC PROCESSOR WITH INTEGRATED FLOATING POINT UNIT
    OKLOBDZIJA, VG
    PROCEEDINGS OF THE TWENTY-FIRST, ANNUAL HAWAII INTERNATIONAL CONFERENCE ON SYSTEM SCIENCES, VOLS 1-4: ARCHITECTURE TRACK, SOFTWARE TRACK, DECISION SUPPORT AND KNOWLEDGE BASED SYSTEMS TRACK, APPLICATIONS TRACK, 1988, : 221 - 229
  • [40] Performance monitoring and tuning for a single-chip multiprocessor digital signal processor
    Kim, J
    Kim, Y
    1996 IEEE SECOND INTERNATIONAL CONFERENCE ON ALGORITHMS & ARCHITECTURES FOR PARALLEL PROCESSING, ICA3PP'96, PROCEEDINGS OF, 1996, : 76 - 83
12345