On the parallelization of single dynamic conditional loops

被引:1
|
作者
Mahjoub, Zaher [1 ]
Jemni, Mohamed [1 ]
机构
[1] Faculte des Sciences de Tunis, Tunis, Tunisia
来源
Simulation Practice and Theory | 1996年 / 4卷 / 2-3期
关键词
D O I
10.1016/0928-4869(95)00041-0
中图分类号
学科分类号
摘要
14
引用
收藏
页码:141 / 154
相关论文
共 50 条
  • [41] Dynamic Parallelization of Single-Threaded Binary Programs using Speculative Slicing
    Wang, Cheng
    Wu, Youfeng
    Borin, Edson
    Hu, Shiliang
    Liu, Wei
    Sager, Dave
    Ngai, Tin-fook
    Fang, Jesse
    ICS'09: PROCEEDINGS OF THE 2009 ACM SIGARCH INTERNATIONAL CONFERENCE ON SUPERCOMPUTING, 2009, : 158 - 168
  • [42] Exploiting locality in the run-time parallelization of irregular loops
    Martín, MJ
    Singh, DE
    Touriño, J
    Rivera, FF
    2002 INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING, PROCEEDING, 2002, : 27 - 34
  • [43] Performance measurements on sandglass-type parallelization of doacross loops
    Takabatake, M
    Honda, H
    Yuba, T
    HIGH-PERFORMANCE COMPUTING AND NETWORKING, PROCEEDINGS, 1999, 1593 : 663 - 672
  • [44] Automatic Parallelization of Irregular x86-64 Loops
    Neth, Brandon
    Strout, Michelle Mills
    PROCEEDINGS OF THE 2019 IEEE/ACM INTERNATIONAL SYMPOSIUM ON CODE GENERATION AND OPTIMIZATION (CGO '19), 2019, : 266 - 266
  • [45] On the parallelization of irregular and dynamic programs
    Plata, O
    Asenjo, R
    Gutiérrez, E
    Corbera, F
    Navarro, A
    Zapata, EL
    PARALLEL COMPUTING, 2005, 31 (06) : 544 - 562
  • [46] Dynamic Parallelization of R Functions
    Bohringer, Stefan
    R JOURNAL, 2013, 5 (02): : 89 - 97
  • [47] An adaptive scheme for dynamic parallelization
    Ding, YH
    Li, ZY
    LANGUAGES AND COMPILERS FOR PARALLEL COMPUTING, 2003, 2624 : 274 - 289
  • [48] Automatic parallelization of a class of irregular loops for distributed memory systems
    Ravishankar, Mahesh
    Eisenlohr, John
    Pouchet, Louis-Noël
    Ramanujam, J.
    Rountev, Atanas
    Sadayappan, P.
    Ravishankar, Mahesh (ravishan@cse.ohio-state.edu), 1600, Association for Computing Machinery, 2 Penn Plaza, Suite 701, New York, NY 10121-0701, United States (01):
  • [49] AUTOMATIC PARALLELIZATION OF WHILE-LOOPS USING SPECULATIVE EXECUTION
    COLLARD, JF
    INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING, 1995, 23 (02) : 191 - 219
  • [50] TRACE SOFTWARE PIPELINING - A NOVEL TECHNIQUE FOR PARALLELIZATION OF LOOPS WITH BRANCHES
    WANG, J
    KRALL, A
    ERTL, MA
    EISENBEIS, C
    PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES, 1994, 50 : 359 - 362